| Name & webpge | Research areas | |
|---|---|---|
| Ing. Miloš Bečvář | CPU architecture, digital design | milos.becvar@centrum.cz |
| Ing. Pavel Benáček, Ph.D. | Network devices | pavel.benacek@gmail.com |
| Ing. Jan Bělohoubek, Ph.D. | Physical security, EDA systems | belohja4@fit.cvut.cz |
| Ing. Jaroslav Borecký, Ph.D. | Self testing circuits based on FPGA | borecjar@fit.cvut.cz |
| doc. Ing. Tomáš Čejka, Ph.D. | Computer networks: traffic monitoring, security, anomalies detection | cejkato2@fit.cvut.cz |
| Ing. Martin Daňhel, Ph.D. | Prediction and analysis of mission critical systems dependability | danhema1@fit.cvut.cz |
| Ing. Radek Dobiáš, Ph.D. | Fault-tolerant design in FPGA Railway sefety devices with programable HW |
radek@radekdobias.cz |
| doc. Ing. Jiří Douša, CSc. | Logic design, simulation | dousa@fit.cvut.cz |
| doc. Ing. Petr Fišer, Ph.D. | Synchronous & asynchronous logic design Two-level minimization, multi-level logic synthesis Diagnostics, BIST, on-line testing Logic synthesis benchmarks |
fiserp@fit.cvut.cz |
| Ing. Robert Hülle, Ph.D. | BIST, SAT-based ATPG | hullerob@fit.cvut.cz |
| Ing. Karel Hynek, Ph.D. | Network flow analysis | hynekkar@fit.cvut.cz |
| doc. Ing. Kateřina Hyniová, CSc. | Control systems | Katerina.Hyniova@fit.cvut.cz |
| Ing. Stanislav Jeřábek, Ph.D. | FT & AR design in FPGA | jerabst1@fit.cvut.cz |
| Ing. Pavel Kubalík, Ph.D. | Self testing circuits based on FPGA High-speed wireless networks |
xkubalik@fit.cvut.cz |
| Ing. Martin Kohlík, Ph.D. | Formal dependability models | kohlimar@fit.cvut.cz |
| prof. Ing. Hana Kubátová, CSc. | Formal methods (Petri nets) in modelling, simulation and hardware design Automata theory Digital systems design Dependable design |
kubatova@fit.cvut.cz |
| Ing. Vojtěch Miškovský, Ph.D. | Side-channel attacks | miskovoj@fit.cvut.cz |
| Dr.-Ing. Martin Novotný | Digital design Arithmetics Cryptography Embedded systems |
novotnym@fit.cvut.cz |
| doc. Ing. Alois Pluháček, CSc. | Digital arithmetic, error correcting coding | pluhacek@fit.cvut.cz |
| doc. Dipl.-Ing. Dr. techn. Stefan Ratschan | Formal verification Hybrid (continuous/discrete) systems |
stefan.ratschan@cs.cas.cz |
| doc. Ing. Jan Schmidt, Ph.D. | Implicit methods, test generation Logic synthesis Finite-field arithmetics EDA systems |
schmidt@fit.cvut.cz |
| Ing. Miroslav Skrbek, Ph.D. | Control systems, robotics | skrbek@fit.cvut.cz |
| Ing. Petr Socha, Ph.D. | Side-Channel Security | sochapet@fit.cvut.cz |
| Ing. Michal Štepanovský, Ph.D. | stepami9@fit.cvut.cz | |
| Dr. Ing. Sven Ubik | Hardware acceleration of video transmissions | ubik@cesnet.cz |
| Ing. Tomáš Vaňát, Ph.D. | Practical experiments with fault injection into programable HW | vanattom@fit.cvut.cz |
| RNDr. Jiří Vyskočil, Ph.D. | vyskoji1@fit.cvut.cz |
| Name & webpge | Research areas | Supervisor | |
|---|---|---|---|
| Ing. Tomáš Beneš | Optimization of architectures for network applications implemented in FPGA | benesto3@fit.cvut.cz | prof. Ing. Hana Kubátová, CSc. doc. Ing. Tomáš Čejka, Ph.D. |
| Ing. Matěj Havránek | Utilizing artificial intelligence in malware analysis | havrama5@fit.cvut.cz | prof. Ing. Hana Kubátová, CSc. Mgr. Peter Kálnai, Ph.D. |
| Ing. Matej Hulák | Methodology towards traffic classification in high-speed network | hulakmat@fit.cvut.cz | doc. Ing. Tomáš Čejka, Ph.D. |
| Ing. Jiří Khun | Acceleration of Interval Constraint Satisfaction | khunjiri@fit.cvut.cz | doc. Ing. Jan Schmidt, Ph.D. Dr.-Ing. Martin Novotný |
| Ing. Josef Koumar | Threat Detection in Network Traffic using Time Series Analysis | koumajos@fit.cvut.cz | doc. Ing. Tomáš Čejka, Ph.D. |
| Ing. Jan Luxemburk | Deep learning for Encrypted Traffic Analysis using Packet Sequences | luxemjan@fit.cvut.cz | prof. Ing. Hana Kubátová, CSc. doc. Ing. Tomáš Čejka, Ph.D. |
| Ing. Filip Němec | Network traffic monitoring for application specific environments | nemecfil@fit.cvut.cz | doc. Ing. Tomáš Čejka, Ph.D. |
| Ing. Matúš Olekšák | Side-channel security of ARX-based cryptography | oleksmat@fit.cvut.cz | Ing. Vojtěch Miškovský, Ph.D. |
| Ing. Jan Onderka | Abstraction-Based Machine-Code Program Verification | onderjan@fit.cvut.cz | doc. Dipl.-Ing. Dr. techn. Stefan Ratschan |
| Ing. Jaroslav Pešek | Acceleration of monitoring tools for encrypted traffic analysis in future networks | pesekja8@fit.cvut.cz | doc. Ing. Tomáš Čejka, Ph.D. |
| Ing. Richard Plný | Heterogeneous and explainable network traffic classification | plnyrich@fit.cvut.cz | Ing. Karel Hynek, Ph.D. |
| Ing. David Pokorný | Side-Channel Cryptanalysis of Post-Quantum Schemes | pokord11@fit.cvut.cz | Dr.-Ing. Martin Novotný, Ing. Petr Socha, Ph.D. |
| Tomáš Přeučil, MSc. | Security of Pervasive Devices | preucto2@fit.cvut.cz | Dr.-Ing. Martin Novotný |
| Ing. Jan Řezníček | Computation of Reliability Parameters based on Dependability Models | reznija5@fit.cvut.cz | prof. Ing. Hana Kubátová, CSc. Ing. Martin Kohlík, Ph.D. |
| Ing. Dominik Soukup | Datasets for network traffic classification | soukudom@fit.cvut.cz | doc. Ing. Tomáš Čejka, Ph.D. |
| Name | Supervisor | Thesis | Year of defence |
|---|---|---|---|
| Tomáš Kolárik | doc. Dipl.-Ing. Dr. techn. Stefan Ratschan | Boolean Satisfiability Modulo Differential Equation Simulations | 2024 |
| Stanislav Jeřábek | doc. Ing. Jan Schmidt, Ph.D. Dr.-Ing. Martin Novotný |
Differential Power Analysis Countermeasures in Programmable Hardware | 2024 |
| Karel Hynek | prof. Ing. Hana Kubátová, CSc. Ing. Tomáš Čejka, Ph.D. |
The Impact of Encrypted DNS on Network Security | 2023 |
| Petr Socha | Dr.-Ing. Martin Novotný Ing. Vojtěch Miškovský, Ph.D. |
Side-Channel Security of Embedded Devices | 2023 |
| Robert Hülle | doc. Ing. Petr Fišer, Ph.D. doc. Ing. Jan Schmidt, Ph.D. |
Automatic Test Pattern Generation of Zero-Aliasing Test for General Output Response Compactor | 2023 |
| Jan Bělohoubek | doc. Ing. Petr Fišer, Ph.D. doc. Ing. Jan Schmidt, Ph.D. |
Testability and Physical Security: The Cell-Level Approach | 2022 |
| Matěj Bartík | Dr. Ing. Sven Ubik Ing. Pavel Kubalík, Ph.D. | Low-Latency Optimizations and Architectures for Compression Algorithms Implemented in (Programmable) Hardware | 2021 |
| Vojtěch Miškovský | prof. Ing. Hana Kubátová, CSc. Dr.-Ing. Martin Novotný |
Side-Channel Analysis: Efficient Attacks and Fault-Tolerant Countermeasures | 2020 |
| Ladislava Smítková Janků | doc. Ing. Kateřina Hyniová, CSc. | Improvement of the Routing in Opportunistic Networks by the Application of Unsupervised and Supervised Machine Learning Techniques | 2019 |
| Jan Pospíšil | doc. Ing. Jan Schmidt, Ph.D. | Reliable FPGA Architectures | 2019 |
| Tomáš Čejka | prof. Ing. Hana Kubátová, CSc. | Stream-wise Parallel Anomaly Detection in Computer Networks | 2018 |
| Martin Daňhel | prof. Ing. Hana Kubátová, CSc. | Prediction and Analysis of Mission Critical Systems Dependability | 2018 |
| Pavel Vít | prof. Ing. Hana Kubátová, CSc. | Dependable design methods for programmable circuits with respect to area overhead? | 2018 |
| Tomáš Vaňát | prof. Ing. Hana Kubátová, CSc. | Physical Fault Injection and Monitoring Methods for Programmable Devices | 2017 |
| Pavel Benáček | prof. Ing. Hana Kubátová, CSc. Ing. Viktor Puš, Ph.D. |
Generation of High-Speed Network Device from High-Level Description | 2017 |
| Jiří Balcárek | doc. Ing. Jan Schmidt, Ph.D. doc. Ing. Petr Fišer, Ph.D. |
Implicit Representations in the Testing and Dependability of Digital Circuits | 2017 |
| Martin Chloupek | prof. Ing. Ondřej Novák, CSc. | Digital Circuits Testing Based on Pattern Ovelapping and Broadcasting | 2017 |
| Jaroslav Borecký | prof. Ing. Hana Kubátová, CSc. | Dependable Systems Design Methods for FPGAs | 2015 |
| Martin Kohlík | prof. Ing. Hana Kubátová, CSc. | Hierarchical Dependability Models Based on Markov Chains | 2015 |
| Jaroslav Sýkora | Ing. Martin Daněk, Ph.D. | Programmable and Customizable Hardware Accelerators for Self-adaptive Virtual Processors in FPGA | 2014 |
| Petr Žejdl | prof. Ing. Hana Kubátová, CSc. Dr. Ing. Sven Ubik |
Low-Latency Video Transmissions for Real-Time Collaboration with a Scalable Hardware Acceleration | 2014 |
| Jiří Kvasnička | prof. Ing. Hana Kubátová, CSc. | Reliability Analysis of SRAM-based Field-Programmable Gate Arrays | 2014 |
| Jiří Halák | prof. Ing. Hana Kubátová, CSc. Dr. Ing. Sven Ubik |
Extendable and Scalable FPGA-based High-speed Packet Processing | 2013 |
| Martin Šťáva | prof. Ing. Ondřej Novák, CSc. | Overlapping Non-dedicated Clusters Architecture | 2013 (defended at FEL) |
| Leoš Kafka | prof. Ing. Ondřej Novák, CSc. | Fault Emulation Techniques for Generic Netlists in FPGAs | 2012 (defended at FEL) |
| Name & webpge | Research areas | |
|---|---|---|
| Ing. Miloš Bečvář | CPU architecture, digital design | milos.becvar@centrum.cz |
| Ing. Pavel Benáček, Ph.D. | Network devices | pavel.benacek@gmail.com |
| Ing. Jan Bělohoubek, Ph.D. | Physical security, EDA systems | belohja4@fit.cvut.cz |
| Ing. Jaroslav Borecký, Ph.D. | Self testing circuits based on FPGA | borecjar@fit.cvut.cz |
| doc. Ing. Tomáš Čejka, Ph.D. | Computer networks: traffic monitoring, security, anomalies detection | cejkato2@fit.cvut.cz |
| Ing. Martin Daňhel, Ph.D. | Prediction and analysis of mission critical systems dependability | danhema1@fit.cvut.cz |
| Ing. Radek Dobiáš, Ph.D. | Fault-tolerant design in FPGA Railway sefety devices with programable HW |
radek@radekdobias.cz |
| doc. Ing. Jiří Douša, CSc. | Logic design, simulation | dousa@fit.cvut.cz |
| doc. Ing. Petr Fišer, Ph.D. | Synchronous & asynchronous logic design Two-level minimization, multi-level logic synthesis Diagnostics, BIST, on-line testing Logic synthesis benchmarks |
fiserp@fit.cvut.cz |
| Ing. Robert Hülle, Ph.D. | BIST, SAT-based ATPG | hullerob@fit.cvut.cz |
| Ing. Karel Hynek, Ph.D. | Network flow analysis | hynekkar@fit.cvut.cz |
| doc. Ing. Kateřina Hyniová, CSc. | Control systems | Katerina.Hyniova@fit.cvut.cz |
| Ing. Stanislav Jeřábek, Ph.D. | FT & AR design in FPGA | jerabst1@fit.cvut.cz |
| Ing. Pavel Kubalík, Ph.D. | Self testing circuits based on FPGA High-speed wireless networks |
xkubalik@fit.cvut.cz |
| Ing. Martin Kohlík, Ph.D. | Formal dependability models | kohlimar@fit.cvut.cz |
| prof. Ing. Hana Kubátová, CSc. | Formal methods (Petri nets) in modelling, simulation and hardware design Automata theory Digital systems design Dependable design |
kubatova@fit.cvut.cz |
| Ing. Vojtěch Miškovský, Ph.D. | Side-channel attacks | miskovoj@fit.cvut.cz |
| Dr.-Ing. Martin Novotný | Digital design Arithmetics Cryptography Embedded systems |
novotnym@fit.cvut.cz |
| doc. Ing. Alois Pluháček, CSc. | Digital arithmetic, error correcting coding | pluhacek@fit.cvut.cz |
| doc. Dipl.-Ing. Dr. techn. Stefan Ratschan | Formal verification Hybrid (continuous/discrete) systems |
stefan.ratschan@cs.cas.cz |
| doc. Ing. Jan Schmidt, Ph.D. | Implicit methods, test generation Logic synthesis Finite-field arithmetics EDA systems |
schmidt@fit.cvut.cz |
| Ing. Miroslav Skrbek, Ph.D. | Control systems, robotics | skrbek@fit.cvut.cz |
| Ing. Petr Socha, Ph.D. | Side-Channel Security | sochapet@fit.cvut.cz |
| Ing. Michal Štepanovský, Ph.D. | stepami9@fit.cvut.cz | |
| Dr. Ing. Sven Ubik | Hardware acceleration of video transmissions | ubik@cesnet.cz |
| Ing. Tomáš Vaňát, Ph.D. | Practical experiments with fault injection into programable HW | vanattom@fit.cvut.cz |
| RNDr. Jiří Vyskočil, Ph.D. | vyskoji1@fit.cvut.cz |
| Name & webpge | Research areas | Supervisor | |
|---|---|---|---|
| Ing. Tomáš Beneš | Optimization of architectures for network applications implemented in FPGA | benesto3@fit.cvut.cz | prof. Ing. Hana Kubátová, CSc. doc. Ing. Tomáš Čejka, Ph.D. |
| Ing. Matěj Havránek | Utilizing artificial intelligence in malware analysis | havrama5@fit.cvut.cz | prof. Ing. Hana Kubátová, CSc. Mgr. Peter Kálnai, Ph.D. |
| Ing. Matej Hulák | Methodology towards traffic classification in high-speed network | hulakmat@fit.cvut.cz | doc. Ing. Tomáš Čejka, Ph.D. |
| Ing. Jiří Khun | Acceleration of Interval Constraint Satisfaction | khunjiri@fit.cvut.cz | doc. Ing. Jan Schmidt, Ph.D. Dr.-Ing. Martin Novotný |
| Ing. Josef Koumar | Threat Detection in Network Traffic using Time Series Analysis | koumajos@fit.cvut.cz | doc. Ing. Tomáš Čejka, Ph.D. |
| Ing. Jan Luxemburk | Deep learning for Encrypted Traffic Analysis using Packet Sequences | luxemjan@fit.cvut.cz | prof. Ing. Hana Kubátová, CSc. doc. Ing. Tomáš Čejka, Ph.D. |
| Ing. Filip Němec | Network traffic monitoring for application specific environments | nemecfil@fit.cvut.cz | doc. Ing. Tomáš Čejka, Ph.D. |
| Ing. Matúš Olekšák | Side-channel security of ARX-based cryptography | oleksmat@fit.cvut.cz | Ing. Vojtěch Miškovský, Ph.D. |
| Ing. Jan Onderka | Abstraction-Based Machine-Code Program Verification | onderjan@fit.cvut.cz | doc. Dipl.-Ing. Dr. techn. Stefan Ratschan |
| Ing. Jaroslav Pešek | Acceleration of monitoring tools for encrypted traffic analysis in future networks | pesekja8@fit.cvut.cz | doc. Ing. Tomáš Čejka, Ph.D. |
| Ing. Richard Plný | Heterogeneous and explainable network traffic classification | plnyrich@fit.cvut.cz | Ing. Karel Hynek, Ph.D. |
| Ing. David Pokorný | Side-Channel Cryptanalysis of Post-Quantum Schemes | pokord11@fit.cvut.cz | Dr.-Ing. Martin Novotný, Ing. Petr Socha, Ph.D. |
| Tomáš Přeučil, MSc. | Security of Pervasive Devices | preucto2@fit.cvut.cz | Dr.-Ing. Martin Novotný |
| Ing. Jan Řezníček | Computation of Reliability Parameters based on Dependability Models | reznija5@fit.cvut.cz | prof. Ing. Hana Kubátová, CSc. Ing. Martin Kohlík, Ph.D. |
| Ing. Dominik Soukup | Datasets for network traffic classification | soukudom@fit.cvut.cz | doc. Ing. Tomáš Čejka, Ph.D. |
| Name | Supervisor | Thesis | Year of defence |
|---|---|---|---|
| Tomáš Kolárik | doc. Dipl.-Ing. Dr. techn. Stefan Ratschan | Boolean Satisfiability Modulo Differential Equation Simulations | 2024 |
| Stanislav Jeřábek | doc. Ing. Jan Schmidt, Ph.D. Dr.-Ing. Martin Novotný |
Differential Power Analysis Countermeasures in Programmable Hardware | 2024 |
| Karel Hynek | prof. Ing. Hana Kubátová, CSc. Ing. Tomáš Čejka, Ph.D. |
The Impact of Encrypted DNS on Network Security | 2023 |
| Petr Socha | Dr.-Ing. Martin Novotný Ing. Vojtěch Miškovský, Ph.D. |
Side-Channel Security of Embedded Devices | 2023 |
| Robert Hülle | doc. Ing. Petr Fišer, Ph.D. doc. Ing. Jan Schmidt, Ph.D. |
Automatic Test Pattern Generation of Zero-Aliasing Test for General Output Response Compactor | 2023 |
| Jan Bělohoubek | doc. Ing. Petr Fišer, Ph.D. doc. Ing. Jan Schmidt, Ph.D. |
Testability and Physical Security: The Cell-Level Approach | 2022 |
| Matěj Bartík | Dr. Ing. Sven Ubik Ing. Pavel Kubalík, Ph.D. | Low-Latency Optimizations and Architectures for Compression Algorithms Implemented in (Programmable) Hardware | 2021 |
| Vojtěch Miškovský | prof. Ing. Hana Kubátová, CSc. Dr.-Ing. Martin Novotný |
Side-Channel Analysis: Efficient Attacks and Fault-Tolerant Countermeasures | 2020 |
| Ladislava Smítková Janků | doc. Ing. Kateřina Hyniová, CSc. | Improvement of the Routing in Opportunistic Networks by the Application of Unsupervised and Supervised Machine Learning Techniques | 2019 |
| Jan Pospíšil | doc. Ing. Jan Schmidt, Ph.D. | Reliable FPGA Architectures | 2019 |
| Tomáš Čejka | prof. Ing. Hana Kubátová, CSc. | Stream-wise Parallel Anomaly Detection in Computer Networks | 2018 |
| Martin Daňhel | prof. Ing. Hana Kubátová, CSc. | Prediction and Analysis of Mission Critical Systems Dependability | 2018 |
| Pavel Vít | prof. Ing. Hana Kubátová, CSc. | Dependable design methods for programmable circuits with respect to area overhead? | 2018 |
| Tomáš Vaňát | prof. Ing. Hana Kubátová, CSc. | Physical Fault Injection and Monitoring Methods for Programmable Devices | 2017 |
| Pavel Benáček | prof. Ing. Hana Kubátová, CSc. Ing. Viktor Puš, Ph.D. |
Generation of High-Speed Network Device from High-Level Description | 2017 |
| Jiří Balcárek | doc. Ing. Jan Schmidt, Ph.D. doc. Ing. Petr Fišer, Ph.D. |
Implicit Representations in the Testing and Dependability of Digital Circuits | 2017 |
| Martin Chloupek | prof. Ing. Ondřej Novák, CSc. | Digital Circuits Testing Based on Pattern Ovelapping and Broadcasting | 2017 |
| Jaroslav Borecký | prof. Ing. Hana Kubátová, CSc. | Dependable Systems Design Methods for FPGAs | 2015 |
| Martin Kohlík | prof. Ing. Hana Kubátová, CSc. | Hierarchical Dependability Models Based on Markov Chains | 2015 |
| Jaroslav Sýkora | Ing. Martin Daněk, Ph.D. | Programmable and Customizable Hardware Accelerators for Self-adaptive Virtual Processors in FPGA | 2014 |
| Petr Žejdl | prof. Ing. Hana Kubátová, CSc. Dr. Ing. Sven Ubik |
Low-Latency Video Transmissions for Real-Time Collaboration with a Scalable Hardware Acceleration | 2014 |
| Jiří Kvasnička | prof. Ing. Hana Kubátová, CSc. | Reliability Analysis of SRAM-based Field-Programmable Gate Arrays | 2014 |
| Jiří Halák | prof. Ing. Hana Kubátová, CSc. Dr. Ing. Sven Ubik |
Extendable and Scalable FPGA-based High-speed Packet Processing | 2013 |
| Martin Šťáva | prof. Ing. Ondřej Novák, CSc. | Overlapping Non-dedicated Clusters Architecture | 2013 (defended at FEL) |
| Leoš Kafka | prof. Ing. Ondřej Novák, CSc. | Fault Emulation Techniques for Generic Netlists in FPGAs | 2012 (defended at FEL) |