Current Projects

• Photoelectric Laser Stimulation of CMOS
  • Photoelectric Laser Stimulation (PLS) of conventional CMOS structures may be used to obtain bits processed by the CMOS circuit
  • CMOS circuits are vulnerable in general
  • Conventional Majority Voter may be exploited to compromise a protected CMOS device
  • Novel attack-resistant structures were developed to enhance CMOS circuit security
  • Contact person: Jan Bělohoubek
  
  
• Photoelectric Laser Stimulation of Conventional Majority Voter
  • Photoelectric Laser Stimulation (PLS) of Conventional Majority Voter may be used to obtain bits stored in register protected by Voter under PLS
  • Contact person: Jan Bělohoubek
  
  
• Random Circuits Generators
  • Parametrized generator of random Boolean functions, in the PLA format
  • Parametrized generator of random FSMs, in the KISS format
  • Contact person: Petr Fišer
  
  
• Petri nets
  • Direct implementation of PN in FPGA
  • Practical models in Design/CPN and other professional Petri Nets design tools
  • Contact person: Hana Kubátová
  
  
• Optimal FSM implementation in FPGAs
  • Searching for the properties, parameters and way of finite state machine (FSM) description
  • Coding and decomposition of FSMs
  • Optimal implementation of combinational circuits
  • Contact person: Hana Kubátová
  
  
• Arithmetic Hardware for GF(2^m)
  • Development of arithmetic units that can be scaled according to the given purpose and environment
  • Interaction between algorithms and FPGA architecture
  • Application fields – embedded cryptographic systems
  • Contact person: Jan Schmidt
  
  
• ADOP: a CPU for educational purposes
  • RISC CPU core
  • Contact person: Hana Kubátová
  
  
• Complex EDA system EDuArd for educational purposes
  • Experimental Electronic Design Automation software
  • For testing new algorithms
  • For simple use
  • Contact person: Petr Fišer, Jan Schmidt
  
  
• Exploration of circuits difficult for synthesis
  • Exploration and generation of "difficult" benchmarks
  • Exploration of syntrhesis processes
  • Generic benchmark generation methods
  • Upper bound of complexity is known
  • Contact person: Petr Fišer, Jan Schmidt
  
  
• Randomized circuit optimization
  • Randomized algorithms for circuit synthesis
  • Resynthesis of circuits by parts
  • Contact person: Petr Fišer
  
  
• SAT-Compress
  • SAT-based test compression
  • Other implicit techniques in ATPG
  • Contact person: Jiří Balcárek
  
  
• COMET
  • COMBO Ethernet Tester
  • Contact person: Tomáš Čejka
  
  
• Netopeer (cooperation on the project)
  • Implementation of server and client part of the NETCONF protocol
  • Contact person: Tomáš Čejka
  
  
• HostStats
  • Host Statistics
  • Network traffic measuring plug-in for NfSen
  • Contact person: Tomáš Čejka
  
  
• TESTEM
  • Security testing of smart electric meters
  • Industrial contract owner: ČEZ
  • Contact person: Tomáš Vaňát
  
  
• ZerOne
  • Robotic platform standard
  • Development of the engine control sensoric network
  • Industrial partner: Quanti, s.r.o.
  • Contact person: Tomáš Vaňát
  
  
• Circular stables control
  • Development of a system for automation of stables control
  • Industrial contract owner: Agromont Vimperk
  • Contact person: Pavel Vít
  
  
• COMBO card diagnostics
  • Testbench Development for COMBO LXT
  • Industrial contract owner: CESNET
  • Contact person: Tomáš Vaňát
  
  
• Remote administration of a PC classroom
  • Development of a system for remote control and monitoring of PCs in a classroom
  • Contact person: Tomáš Vaňát