Photoelectric Laser Stimulation of CMOS


Description

  • Photoelectric Laser Stimulation (PLS) of CMOS may be used to decrease entropy of data processed by the circuit under attack
  • Conventional Majority Voter may be exploited to compromise a protected CMOS device
  • Novel attack-resistant structures were developed to enhance CMOS circuit security

  • This repository contains SPICE models used to derive behaviour CMOS under Photoelectric Laser Stimulation (PLS)
  • In paper [A], we argue, that PLS may be used to obtain bits stored in register protected by Voter under PLS
  • In paper [B], the data dependency of CMOS logic power consumption under PLS is described
  • In paper [C], the CMOS structures with increased attack-resistance combining PLS and power analysis (e.g. DPA) are described. The attack-resistant structures are subject of the patent application submitted in March 2020 to the Czech Industrial Property Office
  • this work is based on models enumerated in References

Requirements

  • ngSPICE is required for netlists simulation
  • Gnuplot is required for subset of visualisations

License

MIT-like University of Illinois/NCSA Open Source License. See github LICENSE file.

Papers

  • [A] Bělohoubek, J.; Fišer, P.; Schmidt, J.: Using Voters May Lead to Secret Leakage. In: 22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2019)
  • [B] Bělohoubek, J.; Fišer, P.; Schmidt, J.: CMOS Illumination Discloses Processed Data. In: Proceedings of the Euromicro Conference on Digital System Design (DSD 2019)
  • [C] Bělohoubek, J.; Fišer, P.; Schmidt, J.: Standard Cell Tuning Enables Data-Independent Static Power Consumption. In: IEEE 23rd International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2020)

If you use data released in the project repository for your research, please include at least one of the mentioned papers into the list of references.

References

  • [1] Alexandre Sarafianos, Olivier Gagliano, Valérie Serradeil, Mathieu Lisart, Jean-Max Dutertre, et al.. Building the electrical model of the pulsed photoelectric laser stimulation of an NMOS transistor in 90nm technology. International Reliability Physics Symposium (IRPS), Apr 2013, Monterey, United States. 2013.
  • [2] A. Sarafianos, O. Gagliano, M. Lisart, V. Serradeil, J. Dutertre and A. Tria, "Building the electrical model of the pulsed photoelectric laser stimulation of a PMOS transistor in 90nm technology," Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), Suzhou, 2013, pp. 22-27.
  • [3] A. Sarafianos, R. Llido, O. Gagliano, V. Serradeil, M. Lisart et al., "Building the electrical model of the pulsed photoelectric laser stimulation of an nmos transistor in 90nm technology," in 38th International Symposium for Testing and Failure Analysis, (ISTFA) 2012, 2012, pp. 5B–5.