Digital Design & Dependability Research Group
Digital Design & Dependability Research Group



Areas of interest

  • Reliability and diagnostics of electronic circuits, design of FPGA architectures with respect to self-diagnostics
  • Dependable circuits design
  • Test generation and compression
  • BIST design
  • Decomposition of combinational and sequential circuits with respect to their implementation
  • Synchronous and asynchronous logic synthesis
  • Hardware implementation of neural networks
  • Randomized algorithms
  • FPGA implementations of arithmetic units
  • Reconfigurable computing, FPGA-based accelerators
  • Acceleration of ECDSA-based cryptography algorithms
  • Cryptanalysis, design of attack-resistant circuits
  • Formal verification
  • Digital circuits simulation
  • Real-Time Systems
  • Modeling of FPGA architectures
  • Generation of benchmarks for logic synthesis and physical design algorithms
  • Petri nets and their hardware implementation
  • Network traffic monitoring

Contact info

Department of Digital System Design
Faculty of Information Technology
Czech Technical University in Prague

Thákurova 9
Praha 6
CZ-160 00
Czech Republic
Phone: +420 2 2435 9811

News

PESW 2025 - The 13th Prague Embedded Systems Workshop
June 26 – 28, 2025
http://pesw.fit.cvut.cz/2025/


Old news...


Areas of interest

  • Reliability and diagnostics of electronic circuits, design of FPGA architectures with respect to self-diagnostics
  • Dependable circuits design
  • Test generation and compression
  • BIST design
  • Decomposition of combinational and sequential circuits with respect to their implementation
  • Synchronous and asynchronous logic synthesis
  • Hardware implementation of neural networks
  • Randomized algorithms
  • FPGA implementations of arithmetic units
  • Reconfigurable computing, FPGA-based accelerators
  • Acceleration of ECDSA-based cryptography algorithms
  • Cryptanalysis, design of attack-resistant circuits
  • Formal verification
  • Digital circuits simulation
  • Real-Time Systems
  • Modeling of FPGA architectures
  • Generation of benchmarks for logic synthesis and physical design algorithms
  • Petri nets and their hardware implementation
  • Network traffic monitoring

Contact info

Department of Digital System Design
Faculty of Information Technology
Czech Technical University in Prague

Thákurova 9
Praha 6
CZ-160 00
Czech Republic
Phone: +420 2 2435 9811

News

PESW 2025 - The 13th Prague Embedded Systems Workshop
June 26 – 28, 2025
http://pesw.fit.cvut.cz/2025/


Old news...