TT-Min - the Fast SOP Minimizer
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Description
Experimental results
References
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Program manual
Info
Contact:
tomandav@fel.cvut.cz
VLSI pages
References
Toman, D., Fišer, P.: A SOP Minimizer for Logic Functions Described by Many Product Terms Based on Ternary Trees, Proc. 9th Int. Workshop on Boolean Problems (IWSBP'10), Freiberg, Germany, 16.-17.9.2010, pp. 165-172
Fišer, P., Toman, D.: A Fast SOP Minimizer for Logic Funcions Described by Many Product Terms, Proc. of 12th Euromicro Conference on Digital Systems Design (DSD'09), Patras (Greece), 27.- 29.8.2009, pp. 757-764