--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity Cookbook__insert_parity is 
  Port (
    pi00,pi01,pi02,pi03,pi04,pi05,pi06,pi07,pi08,pi09,pi10,pi11,pi12,pi13,pi14,pi15,pi16,pi17,pi18,pi19,pi20,pi21,pi22,pi23,pi24,pi25,pi26,pi27,pi28,pi29,pi30,pi31,pi32,pi33,pi34,pi35,pi36,pi37,pi38,pi39,pi40,pi41,pi42,pi43,pi44: in std_logic;
    po0,po1,po2,po3,po4: inout std_logic
  );
end Cookbook__insert_parity;

architecture Cookbook__insert_parity_behav of Cookbook__insert_parity is
signal n50,n51,n52,n53,n54,n55,n56,n58,n59,n60,n61,n62,n63,n64,n66,n67,n68,n69,n70,n71,n72,n74,n75,n76,n77,n78,n79,n80,n82,n83,n84,n85,n86,n87,n88: std_logic;
begin
    n50 <= ( not pi44 and pi43 )
      or ( pi44 and not pi43 );
    n51 <= ( not pi42 and pi41 )
      or ( pi42 and not pi41 );
    n52 <= ( not n50 and n51 )
      or ( n50 and not n51 );
    n53 <= ( not pi40 and pi39 )
      or ( pi40 and not pi39 );
    n54 <= ( not pi37 and pi36 )
      or ( pi37 and not pi36 );
    n55 <= ( not pi38 and n54 )
      or ( pi38 and not n54 );
    n56 <= ( not n53 and n55 )
      or ( n53 and not n55 );
    po4 <= ( not n52 and not n56 )
      or ( n52 and n56 );
    n58 <= ( not pi35 and pi34 )
      or ( pi35 and not pi34 );
    n59 <= ( not pi33 and pi32 )
      or ( pi33 and not pi32 );
    n60 <= ( not n58 and n59 )
      or ( n58 and not n59 );
    n61 <= ( not pi31 and pi30 )
      or ( pi31 and not pi30 );
    n62 <= ( not pi28 and pi27 )
      or ( pi28 and not pi27 );
    n63 <= ( not pi29 and n62 )
      or ( pi29 and not n62 );
    n64 <= ( not n61 and n63 )
      or ( n61 and not n63 );
    po3 <= ( not n60 and not n64 )
      or ( n60 and n64 );
    n66 <= ( not pi26 and pi25 )
      or ( pi26 and not pi25 );
    n67 <= ( not pi24 and pi23 )
      or ( pi24 and not pi23 );
    n68 <= ( not n66 and n67 )
      or ( n66 and not n67 );
    n69 <= ( not pi22 and pi21 )
      or ( pi22 and not pi21 );
    n70 <= ( not pi19 and pi18 )
      or ( pi19 and not pi18 );
    n71 <= ( not pi20 and n70 )
      or ( pi20 and not n70 );
    n72 <= ( not n69 and n71 )
      or ( n69 and not n71 );
    po2 <= ( not n68 and not n72 )
      or ( n68 and n72 );
    n74 <= ( not pi17 and pi16 )
      or ( pi17 and not pi16 );
    n75 <= ( not pi15 and pi14 )
      or ( pi15 and not pi14 );
    n76 <= ( not n74 and n75 )
      or ( n74 and not n75 );
    n77 <= ( not pi13 and pi12 )
      or ( pi13 and not pi12 );
    n78 <= ( not pi10 and pi09 )
      or ( pi10 and not pi09 );
    n79 <= ( not pi11 and n78 )
      or ( pi11 and not n78 );
    n80 <= ( not n77 and n79 )
      or ( n77 and not n79 );
    po1 <= ( not n76 and not n80 )
      or ( n76 and n80 );
    n82 <= ( not pi08 and pi07 )
      or ( pi08 and not pi07 );
    n83 <= ( not pi06 and pi05 )
      or ( pi06 and not pi05 );
    n84 <= ( not n82 and n83 )
      or ( n82 and not n83 );
    n85 <= ( not pi04 and pi03 )
      or ( pi04 and not pi03 );
    n86 <= ( not pi01 and pi00 )
      or ( pi01 and not pi00 );
    n87 <= ( not pi02 and n86 )
      or ( pi02 and not n86 );
    n88 <= ( not n85 and n87 )
      or ( n85 and not n87 );
    po0 <= ( not n84 and not n88 )
      or ( n84 and n88 );
end Cookbook__insert_parity_behav;
