--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity IWLS93__misex1 is 
  Port (
    pi0,pi1,pi2,pi3,pi4,pi5,pi6,pi7: in std_logic;
    po0,po1,po2,po3,po4,po5,po6: inout std_logic
  );
end IWLS93__misex1;

architecture IWLS93__misex1_behav of IWLS93__misex1 is
signal n22,n23,n24,n25,n26,n27,n28,n29,n30,n31,n32,n33,n34,n35,n36,n37,n38,n39,n40,n41,n42,n43,n44,n45,n46,n47,n48,n49,n50,n51,n52,n53,n54,n55,n56,n57: std_logic;
begin
    po0 <= ( n53 )
      or ( n51 );
    po1 <= ( n37 )
      or ( n38 );
    po2 <= ( n45 )
      or ( n47 );
    po3 <= ( n50 )
      or ( n55 );
    po4 <= ( n53 )
      or ( n54 );
    po5 <= ( n39 )
      or ( n40 );
    po6 <= ( n36 )
      or ( n50 );
    n22 <= ( not pi2 and not pi4 );
    n23 <= ( not pi5 and pi6 and not pi7 );
    n24 <= ( pi3 and n23 );
    n25 <= ( not pi1 and not pi4 );
    n26 <= ( pi5 and not pi6 and not pi7 );
    n27 <= ( n25 and n26 );
    n28 <= ( not pi5 and not pi6 and not pi7 );
    n29 <= ( n22 and n28 );
    n30 <= ( pi5 and pi6 and not pi7 );
    n31 <= ( pi4 and n26 );
    n32 <= ( pi1 and n26 );
    n33 <= ( not pi4 and not pi5 and not pi7 );
    n34 <= ( pi2 and n33 );
    n35 <= ( not pi4 and pi5 and not pi6 );
    n36 <= ( pi4 and n30 );
    n37 <= ( n41 )
      or ( n23 )
      or ( n42 );
    n38 <= ( n32 )
      or ( n50 )
      or ( n34 );
    n39 <= ( n23 )
      or ( n31 );
    n40 <= ( n32 )
      or ( n42 )
      or ( n34 );
    n41 <= ( pi4 and pi5 and not pi7 );
    n42 <= ( pi4 and n56 );
    n43 <= ( not pi3 and n23 );
    n44 <= ( not pi1 and n35 );
    n45 <= ( n23 )
      or ( n41 );
    n46 <= ( not pi0 and n23 );
    n47 <= ( n33 )
      or ( n35 )
      or ( n42 );
    n48 <= ( not pi3 and not pi4 );
    n49 <= ( n48 and n23 );
    n50 <= ( not pi4 and n57 );
    n51 <= ( n43 )
      or ( n50 )
      or ( n44 );
    n52 <= ( pi4 and pi6 and not pi7 );
    n53 <= ( n52 )
      or ( n42 );
    n54 <= ( n27 )
      or ( n24 )
      or ( n29 );
    n55 <= ( n46 )
      or ( n44 )
      or ( n49 );
    n56 <= ( not pi5 and not pi6 and pi7 );
    n57 <= ( pi5 and not pi6 and pi7 );
end IWLS93__misex1_behav;
