--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity Cookbook__ucrypt__part153 is 
  Port (
    lo0480: in std_logic;
    n3659: inout std_logic
  );
end Cookbook__ucrypt__part153;

architecture Cookbook__ucrypt__part153_behav of Cookbook__ucrypt__part153 is
begin
    n3659 <= ( lo0480 );
end Cookbook__ucrypt__part153_behav;
