--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity Cookbook__ucrypt__part599 is 
  Port (
    lo2158: in std_logic;
    n12009_1: inout std_logic
  );
end Cookbook__ucrypt__part599;

architecture Cookbook__ucrypt__part599_behav of Cookbook__ucrypt__part599 is
begin
    n12009_1 <= ( lo2158 );
end Cookbook__ucrypt__part599_behav;
