--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity Cookbook__ucrypt__part150 is 
  Port (
    lo0477: in std_logic;
    n3644: inout std_logic
  );
end Cookbook__ucrypt__part150;

architecture Cookbook__ucrypt__part150_behav of Cookbook__ucrypt__part150 is
begin
    n3644 <= ( lo0477 );
end Cookbook__ucrypt__part150_behav;
