--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity Cookbook__approx_fp_div_lut is 
  Port (
    pi0,pi1,pi2,pi3,pi4,pi5: in std_logic;
    po0,po1,po2,po3,po4,po5,po6: inout std_logic
  );
end Cookbook__approx_fp_div_lut;

architecture Cookbook__approx_fp_div_lut_behav of Cookbook__approx_fp_div_lut is
signal n13,n14,n15,n16,n17,n18,n19,n20,n21,n22,n23,n24,n25,n26,n27,n28,n29,n30,n32,n33,n34,n35,n36,n37,n38,n39,n40,n41,n42,n43,n44,n45,n46,n47,n48,n49,n51,n52,n53,n54,n55,n56,n57,n58,n59,n60,n61,n62,n63,n64,n65,n66,n67,n68,n69,n70,n71,n73,n74,n75,n76,n77,n78,n79,n80,n81,n82,n83,n84,n85,n86,n87,n88,n89,n90,n91,n92,n94,n95,n96,n97,n98,n99,n100,n101,n102,n103,n104,n105,n106,n107,n108,n110,n111,n112,n113,n114,n115,n116,n117,n118,n119,n121,n122,n123,n124: std_logic;
begin
    n13 <= ( not pi5 and not pi4 )
      or ( pi5 and pi4 );
    n14 <= ( n13 and pi3 );
    n15 <= ( not pi5 and pi4 );
    n16 <= ( pi5 and not pi3 )
      or ( n15 and pi3 );
    n17 <= ( n14 and not pi2 )
      or ( n16 and pi2 );
    n18 <= not (( not pi5 and not pi4 ));
    n19 <= ( n18 and not pi3 );
    n20 <= ( n19 and not pi2 );
    n21 <= ( n17 and not pi1 )
      or ( n20 and pi1 );
    n22 <= not (( not pi5 and not pi4 ));
    n23 <= ( n22 and not pi3 )
      or ( pi4 and pi3 );
    n24 <= ( not pi5 and pi4 );
    n25 <= ( pi4 and not pi3 )
      or ( n24 and pi3 );
    n26 <= ( n23 and not pi2 )
      or ( n25 and pi2 );
    n27 <= ( not pi5 and pi4 );
    n28 <= ( pi5 and not pi3 )
      or ( n27 and pi3 );
    n29 <= ( n28 and not pi2 )
      or ( not pi5 and pi2 );
    n30 <= ( n26 and not pi1 )
      or ( n29 and pi1 );
    po6 <= ( n21 and not pi0 )
      or ( n30 and pi0 );
    n32 <= not (( not pi5 and not pi4 ));
    n33 <= ( n32 and pi3 );
    n34 <= ( not pi5 and pi4 )
      or ( pi5 and not pi4 );
    n35 <= ( pi4 and not pi3 )
      or ( n34 and pi3 );
    n36 <= ( n33 and not pi2 )
      or ( n35 and pi2 );
    n37 <= not (( not pi5 and pi4 ));
    n38 <= ( n37 and not pi3 )
      or ( pi5 and pi3 );
    n39 <= ( n38 and not pi2 )
      or ( pi5 and pi2 );
    n40 <= ( n36 and not pi1 )
      or ( n39 and pi1 );
    n41 <= ( not pi5 and pi3 )
      or ( pi5 and not pi3 );
    n42 <= not (( pi5 and not pi4 ));
    n43 <= ( pi5 and not pi3 )
      or ( n42 and pi3 );
    n44 <= ( n41 and not pi2 )
      or ( n43 and pi2 );
    n45 <= ( not pi5 and pi4 )
      or ( pi5 and not pi4 );
    n46 <= ( pi5 and not pi4 );
    n47 <= ( n45 and not pi3 )
      or ( n46 and pi3 );
    n48 <= ( n47 and not pi2 )
      or ( not pi4 and pi2 );
    n49 <= ( n44 and not pi1 )
      or ( n48 and pi1 );
    po5 <= ( n40 and not pi0 )
      or ( n49 and pi0 );
    n51 <= not (( pi5 and not pi4 ));
    n52 <= ( pi5 and not pi3 )
      or ( n51 and pi3 );
    n53 <= ( not pi5 and not pi2 )
      or ( n52 and pi2 );
    n54 <= ( not pi5 and pi4 )
      or ( pi5 and not pi4 );
    n55 <= ( not pi5 and pi4 )
      or ( pi5 and not pi4 );
    n56 <= ( n54 and not pi3 )
      or ( n55 and pi3 );
    n57 <= ( not pi5 and pi4 )
      or ( pi5 and not pi4 );
    n58 <= ( not pi5 and pi4 )
      or ( pi5 and not pi4 );
    n59 <= ( n57 and not pi3 )
      or ( n58 and pi3 );
    n60 <= ( n56 and not pi2 )
      or ( n59 and pi2 );
    n61 <= ( n53 and not pi1 )
      or ( n60 and pi1 );
    n62 <= ( not pi5 and pi4 )
      or ( pi5 and not pi4 );
    n63 <= ( n62 and not pi3 )
      or ( pi4 and pi3 );
    n64 <= ( not pi5 and not pi4 )
      or ( pi5 and pi4 );
    n65 <= ( n64 and not pi3 )
      or ( not pi4 and pi3 );
    n66 <= ( n63 and not pi2 )
      or ( n65 and pi2 );
    n67 <= not (( not pi5 and not pi4 ));
    n68 <= ( not pi5 and not pi4 );
    n69 <= ( n67 and not pi3 )
      or ( n68 and pi3 );
    n70 <= ( n69 and not pi2 )
      or ( not pi3 and pi2 );
    n71 <= ( n66 and not pi1 )
      or ( n70 and pi1 );
    po4 <= ( n61 and not pi0 )
      or ( n71 and pi0 );
    n73 <= ( not pi5 and pi4 )
      or ( pi5 and not pi4 );
    n74 <= ( n73 and not pi3 )
      or ( pi4 and pi3 );
    n75 <= ( not pi4 and not pi2 )
      or ( n74 and pi2 );
    n76 <= ( not pi5 and not pi4 );
    n77 <= not (( not pi5 and not pi4 ));
    n78 <= ( n76 and not pi3 )
      or ( n77 and pi3 );
    n79 <= ( not pi5 and not pi4 );
    n80 <= not (( not pi5 and not pi4 ));
    n81 <= ( n79 and not pi3 )
      or ( n80 and pi3 );
    n82 <= ( n78 and not pi2 )
      or ( n81 and pi2 );
    n83 <= ( n75 and not pi1 )
      or ( n82 and pi1 );
    n84 <= ( not pi5 and not pi4 );
    n85 <= ( n84 and not pi3 )
      or ( pi4 and pi3 );
    n86 <= not (( pi5 and pi4 ));
    n87 <= ( n86 and not pi3 );
    n88 <= ( n85 and not pi2 )
      or ( n87 and pi2 );
    n89 <= not (( not pi5 and not pi4 ));
    n90 <= not (( not n89 and not pi3 ));
    n91 <= ( n90 and not pi2 );
    n92 <= ( n88 and not pi1 )
      or ( n91 and pi1 );
    po3 <= ( n83 and not pi0 )
      or ( n92 and pi0 );
    n94 <= not (( not pi5 and not pi4 ));
    n95 <= ( n94 and not pi3 )
      or ( not pi4 and pi3 );
    n96 <= ( not pi3 and not pi2 )
      or ( n95 and pi2 );
    n97 <= not (( not pi5 and not pi4 ));
    n98 <= ( n97 and pi3 );
    n99 <= ( not pi5 and not pi4 );
    n100 <= not (( not n99 and pi3 ));
    n101 <= ( n98 and not pi2 )
      or ( n100 and pi2 );
    n102 <= ( n96 and not pi1 )
      or ( n101 and pi1 );
    n103 <= ( pi4 and pi3 );
    n104 <= not (( not n103 and not pi2 ));
    n105 <= ( not pi5 and not pi4 );
    n106 <= ( n105 and not pi3 );
    n107 <= ( n106 and not pi2 );
    n108 <= ( n104 and not pi1 )
      or ( n107 and pi1 );
    po2 <= ( n102 and not pi0 )
      or ( n108 and pi0 );
    n110 <= ( not pi5 and not pi4 );
    n111 <= ( n110 and not pi3 );
    n112 <= not (( not n111 and pi2 ));
    n113 <= not (( not pi5 and not pi4 ));
    n114 <= ( n113 and pi3 );
    n115 <= not (( not n114 and not pi2 ));
    n116 <= ( n112 and not pi1 )
      or ( n115 and pi1 );
    n117 <= not (( pi4 and pi3 ));
    n118 <= ( n117 and not pi2 );
    n119 <= ( n118 and not pi1 );
    po1 <= ( n116 and not pi0 )
      or ( n119 and pi0 );
    n121 <= ( not pi5 and not pi4 );
    n122 <= not (( not n121 and pi3 ));
    n123 <= ( n122 and not pi2 );
    n124 <= not (( not n123 and pi1 ));
    po0 <= ( n124 and not pi0 );
end Cookbook__approx_fp_div_lut_behav;
