--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity Espresso__newtpla is 
  Port (
    pi00,pi01,pi02,pi03,pi04,pi05,pi06,pi07,pi08,pi09,pi10,pi11,pi12,pi13,pi14: in std_logic;
    po0,po1,po2,po3,po4: inout std_logic
  );
end Espresso__newtpla;

architecture Espresso__newtpla_behav of Espresso__newtpla is
begin
    po0 <= ( pi04 and not pi05 and not pi06 and pi07 and pi08 and pi13 )
      or ( not pi00 and not pi01 and not pi02 and not pi03 and pi04 and pi05 and not pi06 and pi07 and pi13 )
      or ( not pi01 and not pi02 and not pi03 and pi04 and pi05 and not pi06 and pi07 and not pi09 and not pi10 and not pi11 and not pi12 and pi13 );
    po1 <= ( pi01 and not pi04 and pi05 and not pi06 and pi07 )
      or ( pi02 and not pi04 and pi05 and not pi06 and pi07 )
      or ( pi03 and not pi04 and pi05 and not pi06 and pi07 );
    po2 <= ( not pi04 and pi05 and not pi06 and pi07 and pi08 and pi13 )
      or ( not pi01 and not pi03 and not pi05 and pi06 and pi07 and pi08 and pi13 )
      or ( not pi01 and not pi04 and not pi05 and pi06 and pi07 and pi08 and pi13 )
      or ( not pi04 and pi05 and not pi06 and pi07 and not pi09 and pi13 and not pi14 )
      or ( not pi02 and not pi03 and pi04 and not pi05 and pi06 and pi07 and pi08 and pi13 )
      or ( pi02 and pi03 and not pi04 and not pi05 and pi06 and pi07 and pi08 and pi13 )
      or ( not pi01 and not pi03 and not pi05 and pi06 and pi07 and not pi09 and pi13 and not pi14 )
      or ( not pi01 and not pi04 and not pi05 and pi06 and pi07 and not pi09 and pi13 and not pi14 )
      or ( not pi01 and not pi02 and not pi03 and pi04 and pi05 and not pi06 and pi07 and not pi08 and pi13 )
      or ( not pi02 and pi03 and pi04 and pi05 and not pi06 and pi07 and not pi08 and pi09 and pi13 )
      or ( not pi02 and pi03 and pi04 and pi05 and not pi06 and pi07 and not pi08 and pi13 and pi14 )
      or ( not pi02 and not pi03 and pi04 and not pi05 and pi06 and pi07 and not pi09 and pi13 and not pi14 )
      or ( pi02 and pi03 and not pi04 and not pi05 and pi06 and pi07 and not pi09 and pi13 and not pi14 )
      or ( not pi02 and pi03 and pi05 and not pi06 and pi07 and pi08 and not pi09 and pi13 and not pi14 );
    po3 <= ( not pi01 and not pi03 and pi04 and not pi05 and pi06 and pi07 and pi13 )
      or ( not pi02 and not pi03 and pi04 and not pi05 and pi06 and pi07 and pi13 );
    po4 <= ( not pi01 and not pi02 and not pi03 and not pi04 and pi05 and not pi06 and pi07 );
end Espresso__newtpla_behav;
