--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity IWLS2005__pci_conf_cyc_addr_dec is 
  Port (
    pi00,pi01,pi02,pi03,pi04,pi05,pi06,pi07,pi08,pi09,pi10,pi11,pi12,pi13,pi14,pi15,pi16,pi17,pi18,pi19,pi20,pi21: in std_logic;
    po00,po01,po02,po03,po04,po05,po06,po07,po08,po09,po10,po11,po12,po13,po14,po15,po16,po17,po18,po19,po20: inout std_logic
  );
end IWLS2005__pci_conf_cyc_addr_dec;

architecture IWLS2005__pci_conf_cyc_addr_dec_behav of IWLS2005__pci_conf_cyc_addr_dec is
signal n64,n65,n66,n67,n68,n69,n70,n71,n72,n73,n74,n75,n76,n77,n78,n79,n80,n81,n82,n83,n84,n85,n86,n87,n88,n89,n90,n91,n92,n93,n94,n95,n96,n97,n98,n99,n100,n101,n102,n103,n104,n105,n106,n107,n108,n109,n110,n111,n112,n113,n114,n115,n116,n117,n118,n119,n120,n121,n122,n123,n124: std_logic;
begin
    po19 <= ( not n91 and not n65 )
      or ( not n80 );
    po18 <= ( not n112 and not n65 )
      or ( not n116 );
    po17 <= ( not n96 and not n64 )
      or ( not n88 );
    po16 <= ( not n85 and not n64 )
      or ( not n81 );
    po20 <= ( not n72 and not pi00 )
      or ( not n108 );
    po15 <= ( not n99 and not n66 )
      or ( not n83 );
    po14 <= ( not n107 and not n66 )
      or ( not n103 );
    po13 <= ( not n110 and not n71 )
      or ( not n109 );
    po12 <= ( not n87 and not n71 )
      or ( not n113 );
    po11 <= ( not n86 and not n73 )
      or ( not n117 );
    po10 <= ( not n84 and not n73 )
      or ( not n82 );
    po09 <= ( not n93 and not n74 )
      or ( not n98 );
    po08 <= ( not n95 and not n74 )
      or ( not n90 );
    po07 <= ( not n102 and not n69 )
      or ( not n97 );
    po06 <= ( not n104 and not n69 )
      or ( not n100 );
    po05 <= ( not n105 and not n67 )
      or ( not n106 );
    po04 <= ( not n94 and not n67 )
      or ( not n123 );
    po03 <= ( not n111 and not n68 )
      or ( not n118 );
    po02 <= ( not n114 and not n68 )
      or ( not n119 );
    po01 <= ( not n115 and not n70 )
      or ( not n122 );
    po00 <= ( not n89 and not n70 )
      or ( not n101 );
    n64 <= not (( not n75 and not pi02 ));
    n65 <= not (( not n75 and pi02 ));
    n66 <= not (( n76 and pi02 ));
    n67 <= not (( n77 and not pi02 ));
    n68 <= not (( n78 and pi02 ));
    n69 <= not (( n77 and pi02 ));
    n70 <= not (( n78 and not pi02 ));
    n71 <= not (( n76 and not pi02 ));
    n72 <= not (( n120 and n92 and pi03 ));
    n73 <= not (( n79 and pi02 ));
    n74 <= not (( n79 and not pi02 ));
    n75 <= not (( pi05 and not pi04 and not pi03 ));
    n76 <= ( not n121 and pi03 );
    n77 <= ( not n124 and pi03 );
    n78 <= ( not n124 and not pi03 );
    n79 <= ( not n121 and not pi03 );
    n80 <= not (( pi20 and pi00 ));
    n81 <= not (( pi17 and pi00 ));
    n82 <= not (( pi11 and pi00 ));
    n83 <= not (( pi16 and pi00 ));
    n84 <= not (( not pi01 and not pi00 ));
    n85 <= not (( not pi01 and not pi00 ));
    n86 <= not (( pi01 and not pi00 ));
    n87 <= not (( not pi01 and not pi00 ));
    n88 <= not (( pi18 and pi00 ));
    n89 <= not (( not pi01 and not pi00 ));
    n90 <= not (( pi09 and pi00 ));
    n91 <= not (( pi01 and not pi00 ));
    n92 <= ( not pi04 and pi05 );
    n93 <= not (( pi01 and not pi00 ));
    n94 <= not (( not pi01 and not pi00 ));
    n95 <= not (( not pi01 and not pi00 ));
    n96 <= not (( pi01 and not pi00 ));
    n97 <= not (( pi08 and pi00 ));
    n98 <= not (( pi10 and pi00 ));
    n99 <= not (( pi01 and not pi00 ));
    n100 <= not (( pi07 and pi00 ));
    n101 <= not (( pi01 and pi00 ));
    n102 <= not (( pi01 and not pi00 ));
    n103 <= not (( pi15 and pi00 ));
    n104 <= not (( not pi01 and not pi00 ));
    n105 <= not (( pi01 and not pi00 ));
    n106 <= not (( pi06 and pi00 ));
    n107 <= not (( not pi01 and not pi00 ));
    n108 <= not (( pi21 and pi00 ));
    n109 <= not (( pi14 and pi00 ));
    n110 <= not (( pi01 and not pi00 ));
    n111 <= not (( pi01 and not pi00 ));
    n112 <= not (( not pi01 and not pi00 ));
    n113 <= not (( pi13 and pi00 ));
    n114 <= not (( not pi01 and not pi00 ));
    n115 <= not (( pi01 and not pi00 ));
    n116 <= not (( pi19 and pi00 ));
    n117 <= not (( pi12 and pi00 ));
    n118 <= not (( pi04 and pi00 ));
    n119 <= not (( pi03 and pi00 ));
    n120 <= ( not pi01 and not pi02 );
    n121 <= not (( not pi05 and pi04 ));
    n122 <= not (( pi02 and pi00 ));
    n123 <= not (( pi05 and pi00 ));
    n124 <= not (( not pi05 and not pi04 ));
end IWLS2005__pci_conf_cyc_addr_dec_behav;
