--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity top is 
  Port (
    pi00,pi01,pi02,pi03,pi04,pi05,pi06,pi07,pi08,pi09,pi10,pi11,pi12,pi13,pi14,pi15,pi16,pi17,pi18,pi19,pi20,pi21,pi22,pi23,pi24,pi25,pi26,pi27,pi28,pi29,pi30,pi31,pi32: in std_logic;
    po00,po01,po02,po03,po04,po05,po06,po07,po08,po09,po10,po11,po12,po13,po14,po15,po16: inout std_logic
  );
end top;

architecture top_behav of top is
signal n51,n53,n55,n57,n59,n61,n63,n65,n67,n69,n71,n73,n75,n77,n79: std_logic;
begin
    po16 <= ( not pi32 and not pi15 and pi31 )
      or ( not pi32 and pi15 and not pi31 )
      or ( pi32 and not pi15 and not pi31 )
      or ( pi32 and pi15 and pi31 );
    n51 <= ( pi32 and pi15 )
      or ( pi32 and pi31 )
      or ( pi15 and pi31 );
    po15 <= ( not n51 and not pi14 and pi30 )
      or ( not n51 and pi14 and not pi30 )
      or ( n51 and not pi14 and not pi30 )
      or ( n51 and pi14 and pi30 );
    n53 <= ( n51 and pi14 )
      or ( n51 and pi30 )
      or ( pi14 and pi30 );
    po14 <= ( not n53 and not pi13 and pi29 )
      or ( not n53 and pi13 and not pi29 )
      or ( n53 and not pi13 and not pi29 )
      or ( n53 and pi13 and pi29 );
    n55 <= ( n53 and pi13 )
      or ( n53 and pi29 )
      or ( pi13 and pi29 );
    po13 <= ( not n55 and not pi12 and pi28 )
      or ( not n55 and pi12 and not pi28 )
      or ( n55 and not pi12 and not pi28 )
      or ( n55 and pi12 and pi28 );
    n57 <= ( n55 and pi12 )
      or ( n55 and pi28 )
      or ( pi12 and pi28 );
    po12 <= ( not n57 and not pi11 and pi27 )
      or ( not n57 and pi11 and not pi27 )
      or ( n57 and not pi11 and not pi27 )
      or ( n57 and pi11 and pi27 );
    n59 <= ( n57 and pi11 )
      or ( n57 and pi27 )
      or ( pi11 and pi27 );
    po11 <= ( not n59 and not pi10 and pi26 )
      or ( not n59 and pi10 and not pi26 )
      or ( n59 and not pi10 and not pi26 )
      or ( n59 and pi10 and pi26 );
    n61 <= ( n59 and pi10 )
      or ( n59 and pi26 )
      or ( pi10 and pi26 );
    po10 <= ( not n61 and not pi09 and pi25 )
      or ( not n61 and pi09 and not pi25 )
      or ( n61 and not pi09 and not pi25 )
      or ( n61 and pi09 and pi25 );
    n63 <= ( n61 and pi09 )
      or ( n61 and pi25 )
      or ( pi09 and pi25 );
    po09 <= ( not n63 and not pi08 and pi24 )
      or ( not n63 and pi08 and not pi24 )
      or ( n63 and not pi08 and not pi24 )
      or ( n63 and pi08 and pi24 );
    n65 <= ( n63 and pi08 )
      or ( n63 and pi24 )
      or ( pi08 and pi24 );
    po08 <= ( not n65 and not pi07 and pi23 )
      or ( not n65 and pi07 and not pi23 )
      or ( n65 and not pi07 and not pi23 )
      or ( n65 and pi07 and pi23 );
    n67 <= ( n65 and pi07 )
      or ( n65 and pi23 )
      or ( pi07 and pi23 );
    po07 <= ( not n67 and not pi06 and pi22 )
      or ( not n67 and pi06 and not pi22 )
      or ( n67 and not pi06 and not pi22 )
      or ( n67 and pi06 and pi22 );
    n69 <= ( n67 and pi06 )
      or ( n67 and pi22 )
      or ( pi06 and pi22 );
    po06 <= ( not n69 and not pi05 and pi21 )
      or ( not n69 and pi05 and not pi21 )
      or ( n69 and not pi05 and not pi21 )
      or ( n69 and pi05 and pi21 );
    n71 <= ( n69 and pi05 )
      or ( n69 and pi21 )
      or ( pi05 and pi21 );
    po05 <= ( not n71 and not pi04 and pi20 )
      or ( not n71 and pi04 and not pi20 )
      or ( n71 and not pi04 and not pi20 )
      or ( n71 and pi04 and pi20 );
    n73 <= ( n71 and pi04 )
      or ( n71 and pi20 )
      or ( pi04 and pi20 );
    po04 <= ( not n73 and not pi03 and pi19 )
      or ( not n73 and pi03 and not pi19 )
      or ( n73 and not pi03 and not pi19 )
      or ( n73 and pi03 and pi19 );
    n75 <= ( n73 and pi03 )
      or ( n73 and pi19 )
      or ( pi03 and pi19 );
    po03 <= ( not n75 and not pi02 and pi18 )
      or ( not n75 and pi02 and not pi18 )
      or ( n75 and not pi02 and not pi18 )
      or ( n75 and pi02 and pi18 );
    n77 <= ( n75 and pi02 )
      or ( n75 and pi18 )
      or ( pi02 and pi18 );
    po02 <= ( not n77 and not pi01 and pi17 )
      or ( not n77 and pi01 and not pi17 )
      or ( n77 and not pi01 and not pi17 )
      or ( n77 and pi01 and pi17 );
    n79 <= ( n77 and pi01 )
      or ( n77 and pi17 )
      or ( pi01 and pi17 );
    po01 <= ( not n79 and not pi00 and pi16 )
      or ( not n79 and pi00 and not pi16 )
      or ( n79 and not pi00 and not pi16 )
      or ( n79 and pi00 and pi16 );
    po00 <= ( n79 and pi00 )
      or ( n79 and pi16 )
      or ( pi00 and pi16 );
end top_behav;
