--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity Cookbook__mult_shift is 
  Port (
    pi0,pi1,pi2,pi3,pi4,pi5,pi6,pi7,pi8,pi9,lo0,lo1,lo2,lo3,lo4,lo5: in std_logic;
    n21,n26,n31_1,n36,n41,n46: inout std_logic
  );
end Cookbook__mult_shift;

architecture Cookbook__mult_shift_behav of Cookbook__mult_shift is
signal n28,n29,n30,n31,n32: std_logic;
begin
    n28 <= not (( not pi9 and not pi8 ));
    n29 <= not (( not pi6 and not pi5 ));
    n30 <= not (( not pi7 and not n29 ));
    n31 <= not (( not n28 and not n30 ));
    n32 <= ( n31 and pi3 );
    n46 <= ( lo5 and not pi0 )
      or ( pi2 and pi0 );
    n26 <= ( lo1 and not pi0 )
      or ( pi4 and pi0 );
    n21 <= ( lo0 and not pi0 )
      or ( n32 and pi0 );
    n31_1 <= ( lo2 and not pi1 )
      or ( lo5 and pi1 );
    n36 <= ( lo3 and not pi1 )
      or ( lo0 and pi1 );
    n41 <= ( lo4 and not pi1 )
      or ( lo1 and pi1 );
end Cookbook__mult_shift_behav;
