--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity top is 
  Port (
    pi0,pi1,pi2,pi3,lo0,lo1,lo2,lo3: in std_logic;
    po0,po1,n13,n18,n23,n28_1: inout std_logic
  );
end top;

architecture top_behav of top is
signal n24,n25,n26,n27,n28,n29,n30,n31,n32,n33,n34,n35,n36,n37,n38,n39,n40,n41,n42,n43,n44,n45,n46,n47,n48,n49,n50,n51,n52,n53,n54: std_logic;
begin
    po0 <= ( not n24 );
    po1 <= ( not n25 );
    n13 <= ( not n26 );
    n18 <= ( not n27 );
    n23 <= ( not n28 );
    n28_1 <= ( not n29 );
    n24 <= ( not n39 and not n40 and not n41 );
    n25 <= ( not n38 and not n43 and not n44 );
    n26 <= ( not n30 and not n45 and not n49 and not n50 );
    n27 <= ( not n30 and not n31 and not n32 and not n33 and not n36 and not n45 and not n47 and not n48 );
    n28 <= ( not n33 and not n34 and not n36 and not n41 and not n51 and not n52 );
    n29 <= ( not n31 and not n35 and not n36 and not n37 and not n42 and not n46 and not n53 and not n54 );
    n30 <= ( pi0 and not pi1 and pi2 and pi3 and not lo1 and not lo2 and lo3 );
    n31 <= ( not pi0 and not pi1 and pi2 and pi3 and lo1 and lo2 and not lo3 );
    n32 <= ( not pi0 and not pi1 and pi2 and pi3 and not lo0 and not lo2 );
    n33 <= ( not pi0 and not pi1 and pi2 and pi3 and lo2 and lo3 );
    n34 <= ( pi1 and pi2 and pi3 and not lo1 and not lo3 );
    n35 <= ( pi0 and not pi1 and pi2 and pi3 and not lo0 );
    n36 <= ( not pi0 and not pi1 and pi2 and pi3 and lo0 and not lo3 );
    n37 <= ( pi1 and pi2 and pi3 and not lo1 and lo2 );
    n38 <= ( pi0 and not pi1 and lo0 and not lo3 );
    n39 <= ( not pi3 and not lo1 and lo2 and lo3 );
    n40 <= ( not pi2 and not lo1 and lo2 and lo3 );
    n41 <= ( pi1 and not lo1 and lo2 and lo3 );
    n42 <= ( not pi0 and not pi1 and lo0 and lo3 );
    n43 <= ( not pi3 and lo0 and not lo3 );
    n44 <= ( not pi2 and lo0 and not lo3 );
    n45 <= ( pi0 and not pi1 and lo0 );
    n46 <= ( not lo1 and lo2 and lo3 );
    n47 <= ( not pi3 and lo1 );
    n48 <= ( not pi2 and lo1 );
    n49 <= ( not pi3 and lo0 );
    n50 <= ( not pi2 and lo0 );
    n51 <= ( not pi3 and lo2 );
    n52 <= ( not pi2 and lo2 );
    n53 <= ( not pi3 and lo3 );
    n54 <= ( not pi2 and lo3 );
end top_behav;
