--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity Cookbook__ucrypt__part57 is 
  Port (
    lo0160: in std_logic;
    n2059: inout std_logic
  );
end Cookbook__ucrypt__part57;

architecture Cookbook__ucrypt__part57_behav of Cookbook__ucrypt__part57 is
begin
    n2059 <= ( lo0160 );
end Cookbook__ucrypt__part57_behav;
