--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity Cookbook__ucrypt__part170 is 
  Port (
    lo0609: in std_logic;
    n4304: inout std_logic
  );
end Cookbook__ucrypt__part170;

architecture Cookbook__ucrypt__part170_behav of Cookbook__ucrypt__part170 is
begin
    n4304 <= ( lo0609 );
end Cookbook__ucrypt__part170_behav;
