--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity top is 
  Port (
    pi0,pi1,pi2,pi3,pi4,pi5,pi6,lo0,lo1,lo2,lo3: in std_logic;
    po0,po1,po2,po3,po4,po5,po6,n29,n34,n39_1,n44_1: inout std_logic
  );
end top;

architecture top_behav of top is
signal n37,n38,n39,n40,n41,n42,n43,n44,n45,n46,n47,n48,n49,n50,n51,n52,n53,n54,n55,n56,n57,n58,n59,n60,n61,n62,n63,n64,n65,n66,n67,n68,n69,n70,n71,n72,n73,n74,n75,n76,n77,n78,n79,n80,n81,n82,n83,n84,n85,n86,n87,n88,n89,n90,n91,n92,n93,n94: std_logic;
begin
    po0 <= ( not n37 );
    po1 <= ( not n38 );
    po2 <= ( not n39 );
    po3 <= ( not n40 );
    po4 <= ( not n41 );
    po5 <= ( not n42 );
    po6 <= ( not n43 );
    n29 <= ( not n44 );
    n34 <= ( not n45 );
    n39_1 <= ( not n46 );
    n44_1 <= ( not n47 );
    n37 <= ( not n51 and not n53 and not n55 and not n57 and not n59 and not n60 and not n61 and not n66 );
    n38 <= ( not n54 and not n61 and not n66 );
    n39 <= ( not n62 and not n63 );
    n40 <= ( not n67 and not n73 and not n82 and not n83 and not n85 and not n86 );
    n41 <= ( not n58 and not n63 );
    n42 <= ( not n61 and not n75 and not n77 and not n78 and not n93 and not n94 );
    n43 <= ( not n49 and not n52 and not n62 and not n63 );
    n44 <= ( not n48 and not n53 and not n54 and not n56 and not n58 and not n61 and not n62 and not n63 and not n66 and not n73 and not n74 and not n81 and not n86 and not n91 and not n92 );
    n45 <= ( not n49 and not n50 and not n52 and not n61 and not n62 and not n63 and not n68 and not n69 and not n70 and not n71 and not n72 and not n74 and not n80 and not n87 and not n92 );
    n46 <= ( not n48 and not n49 and not n50 and not n53 and not n56 and not n64 and not n65 and not n70 and not n71 and not n73 and not n76 and not n79 and not n86 and not n88 and not n90 and not n92 );
    n47 <= ( not n51 and not n55 and not n57 and not n58 and not n59 and not n60 and not n61 and not n66 and not n70 and not n71 and not n73 and not n76 and not n80 and not n81 and not n84 and not n89 and not n90 and not n92 );
    n48 <= ( pi0 and not pi1 and pi2 and not pi3 and not pi4 and not lo0 and not lo1 and not lo2 and not lo3 );
    n49 <= ( pi0 and not pi1 and not pi2 and not pi3 and pi4 and not lo0 and not lo1 and not lo2 and not lo3 );
    n50 <= ( pi0 and not pi1 and pi2 and not pi3 and not pi4 and not lo0 and not lo1 and not lo2 and lo3 );
    n51 <= ( pi0 and not pi1 and not pi2 and not pi3 and pi4 and not lo0 and not lo1 and lo2 and lo3 );
    n52 <= ( pi0 and not pi1 and pi2 and not pi5 and not lo0 and not lo1 and lo2 and not lo3 );
    n53 <= ( pi0 and not pi1 and not pi2 and not pi3 and pi4 and not lo0 and lo1 and not lo2 and lo3 );
    n54 <= ( pi0 and not pi1 and not pi2 and pi3 and lo0 and lo1 and not lo2 and lo3 );
    n55 <= ( pi2 and not pi3 and pi4 and not lo0 and lo1 and lo2 and lo3 );
    n56 <= ( pi0 and not pi1 and not pi2 and pi4 and lo0 and lo1 and lo2 and not lo3 );
    n57 <= ( pi2 and pi3 and not pi4 and not lo0 and lo1 and lo2 and lo3 );
    n58 <= ( pi0 and not pi1 and pi3 and not pi4 and lo0 and not lo1 and not lo2 and not lo3 );
    n59 <= ( pi0 and not pi1 and not pi2 and pi3 and not pi4 and not lo1 and lo2 and lo3 );
    n60 <= ( pi0 and not pi1 and pi3 and not pi4 and lo0 and not lo1 and lo2 and lo3 );
    n61 <= ( pi0 and not pi1 and not pi2 and pi3 and not pi4 and not lo0 and not lo1 and not lo2 and not lo3 );
    n62 <= ( pi0 and not pi1 and not pi2 and pi3 and pi4 and not lo0 and not lo1 and not lo2 );
    n63 <= ( pi0 and not pi1 and pi3 and not pi4 and lo0 and not lo1 and lo2 and not lo3 );
    n64 <= ( pi0 and not pi1 and not pi3 and lo0 and lo1 and not lo2 and not lo3 );
    n65 <= ( pi0 and not pi1 and not pi3 and not pi4 and lo0 and not lo1 and lo2 );
    n66 <= ( pi0 and not pi1 and not pi2 and pi3 and not pi4 and not lo0 and lo1 and not lo2 );
    n67 <= ( pi3 and pi4 and not lo0 and not lo1 and lo2 and lo3 );
    n68 <= ( pi0 and not pi1 and not pi2 and lo0 and lo1 and lo2 and not lo3 );
    n69 <= ( pi0 and not pi1 and pi2 and not lo0 and lo1 and lo2 and not lo3 );
    n70 <= ( pi2 and pi3 and pi4 and not lo0 and lo1 and lo2 and lo3 );
    n71 <= ( pi2 and not pi3 and not pi4 and not lo0 and lo1 and lo2 and lo3 );
    n72 <= ( pi0 and not pi1 and pi4 and not lo0 and lo1 and lo2 and not lo3 );
    n73 <= ( pi0 and not pi1 and not pi2 and pi3 and pi4 and not lo0 and lo1 and not lo2 );
    n74 <= ( pi0 and not pi1 and pi3 and lo0 and lo1 and not lo2 and not lo3 );
    n75 <= ( pi4 and lo0 and not lo1 and lo2 and not lo3 );
    n76 <= ( pi0 and not pi1 and not pi2 and not pi3 and not pi4 and not lo1 and lo3 );
    n77 <= ( pi1 and pi6 and not lo2 and lo3 );
    n78 <= ( not pi0 and pi6 and not lo2 and lo3 );
    n79 <= ( pi0 and not pi1 and not pi5 and not lo0 and lo2 and not lo3 );
    n80 <= ( pi0 and not pi1 and not pi2 and lo0 and lo1 and not lo2 and lo3 );
    n81 <= ( pi0 and not pi1 and not pi4 and lo0 and not lo1 and not lo2 and lo3 );
    n82 <= ( pi1 and not lo0 and not lo1 and lo2 and lo3 );
    n83 <= ( not pi0 and not lo0 and not lo1 and lo2 and lo3 );
    n84 <= ( pi0 and not pi1 and not pi2 and not pi4 and not lo2 and lo3 );
    n85 <= ( not pi2 and not lo0 and lo1 and lo2 and lo3 );
    n86 <= ( pi0 and not pi1 and pi2 and not lo0 and not lo1 and lo2 and lo3 );
    n87 <= ( pi0 and not pi1 and not pi2 and not lo0 and lo1 and not lo2 );
    n88 <= ( pi0 and not pi1 and not lo0 and lo1 and lo2 and not lo3 );
    n89 <= ( pi0 and not pi1 and not lo0 and not lo1 and not lo2 and lo3 );
    n90 <= ( pi0 and not pi1 and not pi3 and lo0 and not lo1 and lo3 );
    n91 <= ( pi0 and not pi1 and not pi3 and lo0 and not lo1 );
    n92 <= ( pi0 and not pi1 and pi3 and lo0 and lo1 and lo2 and lo3 );
    n93 <= ( pi1 and lo0 );
    n94 <= ( not pi0 and lo0 );
end top_behav;
