--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity Cookbook__ucrypt__part543 is 
  Port (
    lo1990: in std_logic;
    n11209_1: inout std_logic
  );
end Cookbook__ucrypt__part543;

architecture Cookbook__ucrypt__part543_behav of Cookbook__ucrypt__part543 is
begin
    n11209_1 <= ( lo1990 );
end Cookbook__ucrypt__part543_behav;
