--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity DFF is
  Port ( D, CLK: in std_logic;
     Q: out std_logic);
end DFF;

architecture Behavior of DFF is
begin
  process(CLK)
  begin
    if CLK'event and CLK = '1' then
      Q <= D;
    end if;
  end process;
end Behavior;

Library IEEE;
use IEEE.std_logic_1164.all;

entity ISCAS__s400 is 
  Port (
    pi0,pi1,pi2, CLK: in std_logic;
    po0,po1,po2,po3,po4,po5: inout std_logic
  );
end ISCAS__s400;

architecture ISCAS__s400_behav of ISCAS__s400 is
component DFF
  Port ( D, CLK: in std_logic;
     Q: out std_logic);
end component;

signal lo00,lo01,lo02,lo03,lo04,lo05,lo06,lo07,lo08,lo09,lo10,lo11,lo12,lo13,lo14,lo15,lo16,lo17,lo18,lo19,lo20,li00,li01,li02,li03,li04,li05,li06,li07,li08,li09,li10,li11,li12,li13,li14,li15,li16,li17,li18,li19,li20,n99,n100,n101,n102,n103,n104,n105,n106,n107,n108,n109,n110,n111,n112,n113,n114,n115,n116,n117,n118,n119,n120,n121,n122,n123,n124,n125,n126,n127,n128,n129,n130,n131,n132,n133,n134,n135,n136,n137,n138,n139,n140,n141,n142,n143,n144,n145,n146,n147,n148,n149,n150,n151,n152,n153,n154,n155,n156,n157,n158,n159,n160,n161,n162,n163,n164,n165,n166,n167,n168,n169,n170,n171,n172,n173,n174,n175,n176,n177,n178,n179,n180,n181,n182,n183,n184: std_logic;
begin
    DFF0: DFF port map (li00, CLK, lo00);
    DFF1: DFF port map (li01, CLK, lo01);
    DFF2: DFF port map (li02, CLK, lo02);
    DFF3: DFF port map (li03, CLK, lo03);
    DFF4: DFF port map (li04, CLK, lo04);
    DFF5: DFF port map (li05, CLK, lo05);
    DFF6: DFF port map (li06, CLK, lo06);
    DFF7: DFF port map (li07, CLK, lo07);
    DFF8: DFF port map (li08, CLK, lo08);
    DFF9: DFF port map (li09, CLK, lo09);
    DFF10: DFF port map (li10, CLK, lo10);
    DFF11: DFF port map (li11, CLK, lo11);
    DFF12: DFF port map (li12, CLK, lo12);
    DFF13: DFF port map (li13, CLK, lo13);
    DFF14: DFF port map (li14, CLK, lo14);
    DFF15: DFF port map (li15, CLK, lo15);
    DFF16: DFF port map (li16, CLK, lo16);
    DFF17: DFF port map (li17, CLK, lo17);
    DFF18: DFF port map (li18, CLK, lo18);
    DFF19: DFF port map (li19, CLK, lo19);
    DFF20: DFF port map (li20, CLK, lo20);
    po0 <= ( lo06 );
    po1 <= ( lo02 );
    po2 <= ( not lo04 );
    po3 <= ( lo07 );
    po4 <= ( not lo03 );
    po5 <= ( lo05 );
    li00 <= ( not pi2 and not n99 );
    li01 <= ( not pi2 and not n100 );
    li02 <= ( not n175 and lo12 );
    li03 <= ( not n111 and not n112 );
    li04 <= ( not n114 and not n115 );
    li05 <= not (( not pi2 and n148 and n149 ));
    li06 <= ( not n104 and not n105 and not n106 and not n107 );
    li07 <= ( not n179 and not n109 );
    li08 <= ( n101 );
    li09 <= ( not pi2 and not n151 and not n182 );
    li10 <= ( not pi2 and not n153 and not n182 );
    li11 <= ( not pi2 and not n155 and not n182 );
    li12 <= ( not pi2 and not n157 and not n182 );
    li13 <= ( not pi2 and not n159 and not n102 );
    li14 <= ( not pi2 and not n161 and not n102 );
    li15 <= ( not pi2 and not n163 and not n102 );
    li16 <= ( not pi2 and not n165 and not n102 );
    li17 <= ( not pi2 and not n167 and not n180 );
    li18 <= ( not pi2 and not n169 and not n180 );
    li19 <= ( not pi2 and not n171 and not n180 );
    li20 <= ( not pi2 and not lo20 and not n180 );
    n99 <= not (( n116 and n117 ));
    n100 <= not (( n118 and n119 ));
    n101 <= not (( n173 and n178 ));
    n102 <= ( not n183 and not n103 and lo13 );
    n103 <= ( not n180 and not lo00 );
    n104 <= ( lo08 and not pi2 );
    n105 <= ( lo10 and not pi2 );
    n106 <= ( lo12 and lo11 and not pi2 );
    n107 <= ( not lo12 and lo09 and not pi2 );
    n108 <= not (( not lo01 and not lo09 and not lo11 and lo12 ));
    n109 <= ( n108 and lo08 );
    n110 <= not (( n173 and n176 ));
    n111 <= ( not n101 and n110 );
    n112 <= ( n101 and n110 and not lo14 );
    n113 <= not (( n141 and n142 and n143 ));
    n114 <= ( not n101 and n113 );
    n115 <= ( n101 and n113 and not lo14 );
    n116 <= not (( pi1 and lo00 ));
    n117 <= not (( not pi1 and not lo00 ));
    n118 <= not (( pi0 and lo01 ));
    n119 <= not (( not pi0 and not lo01 ));
    n120 <= ( n102 and lo10 and lo11 and lo12 );
    n121 <= not (( not n120 and not lo09 ));
    n122 <= ( n102 and lo11 and lo12 );
    n123 <= not (( not n122 and not lo10 ));
    n124 <= ( n102 and lo12 );
    n125 <= not (( not n124 and not lo11 ));
    n126 <= not (( not n102 and not lo12 ));
    n127 <= ( not n103 and lo14 and lo15 and lo16 );
    n128 <= not (( not n127 and not lo13 ));
    n129 <= ( not n103 and lo15 and lo16 );
    n130 <= not (( not n129 and not lo14 ));
    n131 <= ( not n103 and lo16 );
    n132 <= not (( not n131 and not lo15 ));
    n133 <= not (( n103 and not lo16 ));
    n134 <= ( lo18 and lo19 and lo20 );
    n135 <= not (( not n134 and not lo17 ));
    n136 <= ( lo19 and lo20 );
    n137 <= not (( not n136 and not lo18 ));
    n138 <= not (( not lo20 and not lo19 ));
    n139 <= not (( not lo11 and lo12 ));
    n140 <= not (( not n139 and not lo01 and not lo09 and lo10 ));
    n141 <= not (( lo10 and not pi2 ));
    n142 <= not (( lo08 and not pi2 ));
    n143 <= not (( not lo12 and not lo11 and lo09 and not pi2 ));
    n144 <= not (( not lo10 and lo09 and not pi2 ));
    n145 <= not (( lo10 and not lo09 and lo01 and not pi2 ));
    n146 <= not (( lo09 and lo01 ));
    n147 <= not (( not lo12 and not lo11 and lo01 ));
    n148 <= not (( not lo10 and not lo09 and not lo08 ));
    n149 <= not (( lo12 and not lo11 and not lo10 and not lo08 ));
    n150 <= not (( n120 and lo09 ));
    n151 <= not (( n121 and n150 ));
    n152 <= not (( n122 and lo10 ));
    n153 <= not (( n123 and n152 ));
    n154 <= not (( n124 and lo11 ));
    n155 <= not (( n125 and n154 ));
    n156 <= not (( n102 and lo12 ));
    n157 <= not (( n126 and n156 ));
    n158 <= not (( n127 and lo13 ));
    n159 <= not (( n128 and n158 ));
    n160 <= not (( n129 and lo14 ));
    n161 <= not (( n130 and n160 ));
    n162 <= not (( n131 and lo15 ));
    n163 <= not (( n132 and n162 ));
    n164 <= not (( not n103 and lo16 ));
    n165 <= not (( n133 and n164 ));
    n166 <= not (( n134 and lo17 ));
    n167 <= not (( n135 and n166 ));
    n168 <= not (( n136 and lo18 ));
    n169 <= not (( n137 and n168 ));
    n170 <= not (( lo20 and lo19 ));
    n171 <= not (( n138 and n170 ));
    n172 <= ( not pi2 and lo08 );
    n173 <= not (( n172 and n140 ));
    n174 <= not (( n144 and n145 ));
    n175 <= not (( not pi2 and not lo08 and not lo10 and lo11 ));
    n176 <= not (( n174 and not lo11 and not lo12 ));
    n177 <= ( not pi2 and lo01 and lo10 and not lo11 );
    n178 <= not (( n177 and not lo12 ));
    n179 <= not (( not pi2 and lo10 and n146 and n147 ));
    n180 <= ( not n184 and lo17 );
    n181 <= ( not lo10 and not lo11 and not lo12 );
    n182 <= ( not n181 and n102 and lo09 );
    n183 <= ( not lo14 and not lo15 and not lo16 );
    n184 <= ( not lo18 and not lo19 and not lo20 );
end ISCAS__s400_behav;
