--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity DFF is
  Port ( D, CLK: in std_logic;
     Q: out std_logic);
end DFF;

architecture Behavior of DFF is
begin
  process(CLK)
  begin
    if CLK'event and CLK = '1' then
      Q <= D;
    end if;
  end process;
end Behavior;

Library IEEE;
use IEEE.std_logic_1164.all;

entity ISCAS__s444 is 
  Port (
    pi0,pi1,pi2, CLK: in std_logic;
    po0,po1,po2,po3,po4,po5: inout std_logic
  );
end ISCAS__s444;

architecture ISCAS__s444_behav of ISCAS__s444 is
component DFF
  Port ( D, CLK: in std_logic;
     Q: out std_logic);
end component;

signal lo00,lo01,lo02,lo03,lo04,lo05,lo06,lo07,lo08,lo09,lo10,lo11,lo12,lo13,lo14,lo15,lo16,lo17,lo18,lo19,lo20,li00,li01,li02,li03,li04,li05,li06,li07,li08,li09,li10,li11,li12,li13,li14,li15,li16,li17,li18,li19,li20,n99,n100,n101,n102,n103,n104,n105,n106,n107,n108,n109,n110,n111,n112,n113,n114,n115,n116,n117,n118,n119,n120,n121,n122,n123,n124,n125,n126,n127,n128,n129,n130,n131,n132,n133,n134,n135,n136,n137,n138,n139,n140,n141,n142,n143,n144,n145,n146,n147,n148,n149,n150,n151,n152,n153,n154,n155,n156,n157,n158,n159,n160,n161,n162,n163,n164,n165,n166,n167,n168,n169,n170,n171,n172,n173,n174,n175,n176,n177,n178,n179,n180,n181,n182,n183,n184,n185,n186,n187,n188,n189,n190,n191,n192,n193,n194,n195: std_logic;
begin
    DFF0: DFF port map (li00, CLK, lo00);
    DFF1: DFF port map (li01, CLK, lo01);
    DFF2: DFF port map (li02, CLK, lo02);
    DFF3: DFF port map (li03, CLK, lo03);
    DFF4: DFF port map (li04, CLK, lo04);
    DFF5: DFF port map (li05, CLK, lo05);
    DFF6: DFF port map (li06, CLK, lo06);
    DFF7: DFF port map (li07, CLK, lo07);
    DFF8: DFF port map (li08, CLK, lo08);
    DFF9: DFF port map (li09, CLK, lo09);
    DFF10: DFF port map (li10, CLK, lo10);
    DFF11: DFF port map (li11, CLK, lo11);
    DFF12: DFF port map (li12, CLK, lo12);
    DFF13: DFF port map (li13, CLK, lo13);
    DFF14: DFF port map (li14, CLK, lo14);
    DFF15: DFF port map (li15, CLK, lo15);
    DFF16: DFF port map (li16, CLK, lo16);
    DFF17: DFF port map (li17, CLK, lo17);
    DFF18: DFF port map (li18, CLK, lo18);
    DFF19: DFF port map (li19, CLK, lo19);
    DFF20: DFF port map (li20, CLK, lo20);
    po0 <= ( lo16 );
    po1 <= ( not lo18 );
    po2 <= ( lo14 );
    po3 <= ( not lo17 );
    po4 <= ( lo19 );
    po5 <= ( lo15 );
    li00 <= ( not n194 and not lo00 and not pi0 );
    li01 <= ( not n194 and n101 and not pi0 );
    li02 <= ( not n194 and n102 and not pi0 );
    li03 <= ( not n194 and n104 and not pi0 );
    li04 <= ( not n100 and n105 and not pi0 );
    li05 <= ( not n100 and n106 and not pi0 );
    li06 <= ( not n100 and n107 and not pi0 );
    li07 <= ( not n100 and n108 and not pi0 );
    li08 <= ( not n195 and n109 and not pi0 );
    li09 <= ( not n195 and n110 and not pi0 );
    li10 <= ( not n195 and n111 and not pi0 );
    li11 <= ( not n195 and n112 and not pi0 );
    li12 <= ( n124 and not pi0 );
    li13 <= ( n103 );
    li14 <= ( not n114 and not n150 );
    li15 <= ( not n115 and not n116 and not n117 and not n118 );
    li16 <= not (( n134 and n131 and not pi0 ));
    li17 <= ( not n126 and not n129 );
    li18 <= ( not n128 and not n130 );
    li19 <= ( lo08 and not n151 );
    li20 <= ( n121 and not pi0 );
    n99 <= ( not lo20 and not n194 );
    n100 <= ( lo07 and not n99 and not n192 );
    n101 <= not (( n152 and n153 ));
    n102 <= not (( n154 and n155 ));
    n103 <= not (( n148 and n157 ));
    n104 <= not (( n158 and n159 ));
    n105 <= not (( n168 and n169 ));
    n106 <= not (( n170 and n171 ));
    n107 <= not (( n172 and n173 ));
    n108 <= not (( n174 and n175 ));
    n109 <= not (( n183 and n184 ));
    n110 <= not (( n185 and n186 ));
    n111 <= not (( n187 and n188 ));
    n112 <= not (( n189 and n190 ));
    n113 <= not (( lo08 and not lo09 and not lo11 and not lo12 ));
    n114 <= ( lo13 and n113 );
    n115 <= ( not pi0 and lo11 and not lo08 );
    n116 <= ( not pi0 and lo09 and lo08 );
    n117 <= ( not pi0 and lo10 );
    n118 <= ( not pi0 and lo13 );
    n119 <= not (( not lo20 and not pi1 ));
    n120 <= not (( lo20 and pi1 ));
    n121 <= ( n119 and n120 );
    n122 <= not (( not lo12 and not pi2 ));
    n123 <= not (( lo12 and pi2 ));
    n124 <= ( n122 and n123 );
    n125 <= not (( n137 and n138 and n139 ));
    n126 <= ( not lo06 and n125 and n103 );
    n127 <= not (( n160 and n157 ));
    n128 <= ( not lo06 and n127 and n103 );
    n129 <= ( n125 and not n103 );
    n130 <= ( n127 and not n103 );
    n131 <= not (( not lo13 and not lo11 and not lo10 ));
    n132 <= not (( lo12 and not lo09 and not lo08 ));
    n133 <= not (( lo12 and lo11 ));
    n134 <= not (( not lo13 and not lo10 and not lo09 and lo08 ));
    n135 <= not (( not pi0 and lo12 and not lo11 and lo10 ));
    n136 <= not (( not pi0 and lo11 and not lo10 ));
    n137 <= not (( not pi0 and lo11 and not lo09 and not lo08 ));
    n138 <= not (( not pi0 and lo13 ));
    n139 <= not (( not pi0 and lo10 ));
    n140 <= not (( lo08 and not lo09 ));
    n141 <= not (( lo10 and not lo11 and not lo12 and not n140 ));
    n142 <= not (( lo01 and lo00 ));
    n143 <= ( lo00 and lo01 );
    n144 <= not (( lo02 and n143 ));
    n145 <= ( lo00 and lo01 and lo02 );
    n146 <= not (( lo03 and n145 ));
    n147 <= ( not lo09 and lo10 and lo12 and not pi0 );
    n148 <= not (( not lo08 and n147 ));
    n149 <= not (( n135 and n136 ));
    n150 <= not (( n132 and n133 and lo10 and not pi0 ));
    n151 <= not (( lo09 and not lo10 and not lo13 and not pi0 ));
    n152 <= not (( lo01 and n142 ));
    n153 <= not (( lo00 and n142 ));
    n154 <= not (( lo02 and n144 ));
    n155 <= not (( n143 and n144 ));
    n156 <= ( lo13 and not pi0 );
    n157 <= not (( n141 and n156 ));
    n158 <= not (( lo03 and n146 ));
    n159 <= not (( n145 and n146 ));
    n160 <= not (( not lo08 and not lo09 and n149 ));
    n161 <= not (( lo04 and not n99 ));
    n162 <= ( lo04 and not n99 );
    n163 <= not (( lo05 and n162 ));
    n164 <= ( lo04 and lo05 and not n99 );
    n165 <= not (( lo06 and n164 ));
    n166 <= ( lo04 and lo05 and lo06 and not n99 );
    n167 <= not (( lo07 and n166 ));
    n168 <= not (( lo04 and n161 ));
    n169 <= not (( not n99 and n161 ));
    n170 <= not (( lo05 and n163 ));
    n171 <= not (( n162 and n163 ));
    n172 <= not (( lo06 and n165 ));
    n173 <= not (( n164 and n165 ));
    n174 <= not (( lo07 and n167 ));
    n175 <= not (( n166 and n167 ));
    n176 <= not (( lo08 and n100 ));
    n177 <= ( lo08 and n100 );
    n178 <= not (( lo09 and n177 ));
    n179 <= ( lo08 and lo09 and n100 );
    n180 <= not (( lo10 and n179 ));
    n181 <= ( lo08 and lo09 and lo10 and n100 );
    n182 <= not (( lo11 and n181 ));
    n183 <= not (( lo08 and n176 ));
    n184 <= not (( n100 and n176 ));
    n185 <= not (( lo09 and n178 ));
    n186 <= not (( n177 and n178 ));
    n187 <= not (( lo10 and n180 ));
    n188 <= not (( n179 and n180 ));
    n189 <= not (( lo11 and n182 ));
    n190 <= not (( n181 and n182 ));
    n191 <= ( not lo00 and not lo01 and not lo02 );
    n192 <= ( not lo04 and not lo05 and not lo06 );
    n193 <= ( not lo08 and not lo09 and not lo10 );
    n194 <= ( lo03 and not n191 );
    n195 <= ( lo11 and n100 and not n193 );
end ISCAS__s444_behav;
