--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity IWLS93__mux is 
  Port (
    pi00,pi01,pi02,pi03,pi04,pi05,pi06,pi07,pi08,pi09,pi10,pi11,pi12,pi13,pi14,pi15,pi16,pi17,pi18,pi19,pi20: in std_logic;
    po0: inout std_logic
  );
end IWLS93__mux;

architecture IWLS93__mux_behav of IWLS93__mux is
signal n23,n24,n25,n26,n27,n28,n29,n30,n31,n32,n33,n34,n35,n36,n37,n38,n39,n40,n41,n42,n43,n44,n45,n46,n47,n48,n49,n50,n51,n52,n53,n54,n55,n56,n57,n58,n59,n60,n61,n62,n63,n64,n65,n66,n67,n68,n69,n70,n71,n72: std_logic;
begin
    po0 <= ( pi05 and n72 );
    n23 <= ( pi03 and not pi18 and not pi19 );
    n24 <= ( not pi03 and not pi16 and not pi17 );
    n25 <= ( pi04 and not pi10 and not pi12 );
    n26 <= ( pi03 and pi04 and not pi18 );
    n27 <= ( not pi03 and pi04 and not pi20 );
    n28 <= ( not pi00 and not pi03 and not pi20 );
    n29 <= ( pi04 and not pi18 and not pi20 );
    n30 <= ( not pi00 and not pi03 and not pi04 );
    n31 <= ( not pi00 and not pi18 and not pi19 and not pi20 );
    n32 <= ( not pi00 and not pi04 and not pi19 );
    n33 <= ( pi03 and not pi04 and not pi19 );
    n34 <= ( n26 )
      or ( n27 )
      or ( n28 )
      or ( n29 )
      or ( n23 )
      or ( n30 )
      or ( n31 )
      or ( n32 )
      or ( n33 );
    n35 <= ( pi04 and not pi14 and not pi16 );
    n36 <= ( not pi03 and not pi12 and not pi13 );
    n37 <= ( pi03 and pi04 and not pi14 );
    n38 <= ( not pi03 and pi04 and not pi16 );
    n39 <= ( pi03 and not pi14 and not pi15 );
    n40 <= ( not pi03 and not pi04 and not pi17 );
    n41 <= ( not pi14 and not pi15 and not pi16 and not pi17 );
    n42 <= ( not pi04 and not pi15 and not pi17 );
    n43 <= ( pi03 and not pi04 and not pi15 );
    n44 <= ( n37 )
      or ( n38 )
      or ( n24 )
      or ( n35 )
      or ( n39 )
      or ( n40 )
      or ( n41 )
      or ( n42 )
      or ( n43 );
    n45 <= ( pi03 and not pi10 and not pi11 );
    n46 <= ( pi03 and pi04 and not pi10 );
    n47 <= ( not pi03 and pi04 and not pi12 );
    n48 <= ( not pi03 and not pi04 and not pi13 );
    n49 <= ( not pi10 and not pi11 and not pi12 and not pi13 );
    n50 <= ( not pi04 and not pi11 and not pi13 );
    n51 <= ( pi03 and not pi04 and not pi11 );
    n52 <= ( n46 )
      or ( n47 )
      or ( n36 )
      or ( n25 )
      or ( n45 )
      or ( n48 )
      or ( n49 )
      or ( n50 )
      or ( n51 );
    n53 <= ( pi03 and pi04 and not pi06 );
    n54 <= ( not pi03 and pi04 and not pi08 );
    n55 <= ( not pi03 and not pi08 and not pi09 );
    n56 <= ( pi04 and not pi06 and not pi08 );
    n57 <= ( pi03 and not pi06 and not pi07 );
    n58 <= ( not pi03 and not pi04 and not pi09 );
    n59 <= ( not pi06 and not pi07 and not pi08 and not pi09 );
    n60 <= ( not pi04 and not pi07 and not pi09 );
    n61 <= ( pi03 and not pi04 and not pi07 );
    n62 <= ( n53 )
      or ( n54 )
      or ( n55 )
      or ( n56 )
      or ( n57 )
      or ( n58 )
      or ( n59 )
      or ( n60 )
      or ( n61 );
    n63 <= ( not pi01 and not pi02 and not n34 );
    n64 <= ( pi01 and not pi02 and not n52 );
    n65 <= ( not pi02 and not n34 and not n52 );
    n66 <= ( not pi01 and pi02 and not n44 );
    n67 <= ( not pi01 and not n34 and not n44 );
    n68 <= ( pi01 and not n52 and not n62 );
    n69 <= ( not n34 and not n44 and not n52 and not n62 );
    n70 <= ( pi01 and pi02 and not n62 );
    n71 <= ( pi02 and not n44 and not n62 );
    n72 <= ( n64 )
      or ( n65 )
      or ( n66 )
      or ( n67 )
      or ( n63 )
      or ( n68 )
      or ( n69 )
      or ( n70 )
      or ( n71 );
end IWLS93__mux_behav;
