--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity Cookbook__ucrypt__part149 is 
  Port (
    lo0476: in std_logic;
    n3639: inout std_logic
  );
end Cookbook__ucrypt__part149;

architecture Cookbook__ucrypt__part149_behav of Cookbook__ucrypt__part149 is
begin
    n3639 <= ( lo0476 );
end Cookbook__ucrypt__part149_behav;
