--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity Cookbook__rgb_to_hue__part9 is 
  Port (
    lo39: in std_logic;
    n280_1: inout std_logic
  );
end Cookbook__rgb_to_hue__part9;

architecture Cookbook__rgb_to_hue__part9_behav of Cookbook__rgb_to_hue__part9 is
begin
    n280_1 <= ( lo39 );
end Cookbook__rgb_to_hue__part9_behav;
