--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity Cookbook__ucrypt__part301 is 
  Port (
    lo1076: in std_logic;
    n6639: inout std_logic
  );
end Cookbook__ucrypt__part301;

architecture Cookbook__ucrypt__part301_behav of Cookbook__ucrypt__part301 is
begin
    n6639 <= ( lo1076 );
end Cookbook__ucrypt__part301_behav;
