--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity Cookbook__ucrypt__part258 is 
  Port (
    lo0921: in std_logic;
    n5864: inout std_logic
  );
end Cookbook__ucrypt__part258;

architecture Cookbook__ucrypt__part258_behav of Cookbook__ucrypt__part258 is
begin
    n5864 <= ( lo0921 );
end Cookbook__ucrypt__part258_behav;
