--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity Cookbook__ucrypt__part358 is 
  Port (
    lo1245: in std_logic;
    n7484: inout std_logic
  );
end Cookbook__ucrypt__part358;

architecture Cookbook__ucrypt__part358_behav of Cookbook__ucrypt__part358 is
begin
    n7484 <= ( lo1245 );
end Cookbook__ucrypt__part358_behav;
