--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity Cookbook__ucrypt__part484 is 
  Port (
    lo1787: in std_logic;
    n10044_1: inout std_logic
  );
end Cookbook__ucrypt__part484;

architecture Cookbook__ucrypt__part484_behav of Cookbook__ucrypt__part484 is
begin
    n10044_1 <= ( lo1787 );
end Cookbook__ucrypt__part484_behav;
