--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity DFF is
  Port ( D, CLK: in std_logic;
     Q: out std_logic);
end DFF;

architecture Behavior of DFF is
begin
  process(CLK)
  begin
    if CLK'event and CLK = '1' then
      Q <= D;
    end if;
  end process;
end Behavior;

Library IEEE;
use IEEE.std_logic_1164.all;

entity IWLS93__s382 is 
  Port (
    pi0,pi1,pi2, CLK: in std_logic;
    po0,po1,po2,po3,po4,po5: inout std_logic
  );
end IWLS93__s382;

architecture IWLS93__s382_behav of IWLS93__s382 is
component DFF
  Port ( D, CLK: in std_logic;
     Q: out std_logic);
end component;

signal lo00,lo01,lo02,lo03,lo04,lo05,lo06,lo07,lo08,lo09,lo10,lo11,lo12,lo13,lo14,lo15,lo16,lo17,lo18,lo19,lo20,li00,li01,li02,li03,li05,li06,li07,li08,li09,li10,li11,li12,li13,li14,li15,li16,li17,li18,li19,li20,n94,n95,n96,n97,n98,n99,n100,n101,n102,n103,n104,n105,n106,n107,n108,n109,n110,n111,n112,n113,n114,n115,n116,n117,n118,n119,n120,n121,n122,li04,n124,n125,n126,n127,n128,n129,n130,n131,n132,n133,n134,n135,n136,n137,n138,n139,n140,n141,n142,n143,n144,n145,n146,n147,n148,n149,n150,n151,n152,n153,n154,n155,n156,n157,n158,n159,n160,n161,n162,n163,n164,n165,n166,n167,n168,n169,n170,n171,n172: std_logic;
begin
    DFF0: DFF port map (li00, CLK, lo00);
    DFF1: DFF port map (li01, CLK, lo01);
    DFF2: DFF port map (li02, CLK, lo02);
    DFF3: DFF port map (li03, CLK, lo03);
    DFF4: DFF port map (li04, CLK, lo04);
    DFF5: DFF port map (li05, CLK, lo05);
    DFF6: DFF port map (li06, CLK, lo06);
    DFF7: DFF port map (li07, CLK, lo07);
    DFF8: DFF port map (li08, CLK, lo08);
    DFF9: DFF port map (li09, CLK, lo09);
    DFF10: DFF port map (li10, CLK, lo10);
    DFF11: DFF port map (li11, CLK, lo11);
    DFF12: DFF port map (li12, CLK, lo12);
    DFF13: DFF port map (li13, CLK, lo13);
    DFF14: DFF port map (li14, CLK, lo14);
    DFF15: DFF port map (li15, CLK, lo15);
    DFF16: DFF port map (li16, CLK, lo16);
    DFF17: DFF port map (li17, CLK, lo17);
    DFF18: DFF port map (li18, CLK, lo18);
    DFF19: DFF port map (li19, CLK, lo19);
    DFF20: DFF port map (li20, CLK, lo20);
    li00 <= ( not pi0 and not n141 and n155 );
    li01 <= ( pi0 )
      or ( not n129 )
      or ( not n134 );
    li02 <= ( not n98 and not n152 and not n156 and not n164 );
    li03 <= ( not n104 and not n108 );
    li05 <= ( not pi0 and not n117 );
    li06 <= ( lo13 and not n165 );
    li07 <= ( not n153 and not n157 );
    li08 <= ( not n140 and not n147 );
    li09 <= ( not pi0 and not n133 );
    li10 <= ( not pi0 and not n118 and not n141 );
    li11 <= ( not pi0 and not n119 and not n141 );
    li12 <= ( not pi0 and not lo12 and not n139 );
    li13 <= ( not pi0 and not n100 and not n141 );
    li14 <= ( not pi0 and n162 and not n163 );
    li15 <= ( not pi0 and not n103 and not n163 );
    li16 <= ( not pi0 and not n97 and not n163 );
    li17 <= ( not pi0 and not n112 and not n163 );
    li18 <= ( not pi0 and n124 and not n139 );
    li19 <= ( not pi0 and not n113 and not n139 );
    li20 <= ( not pi0 and not n116 and not n139 );
    po2 <= ( not lo08 );
    po4 <= ( not lo07 );
    n94 <= ( not lo16 )
      or ( not n102 );
    n95 <= ( not lo10 and not lo11 and not lo13 );
    n96 <= ( not lo10 )
      or ( not n125 );
    n97 <= ( not n94 )
      or ( not n148 );
    n98 <= ( not pi0 and lo04 );
    n99 <= ( not lo17 )
      or ( n132 );
    n100 <= ( not n110 )
      or ( not n114 );
    n101 <= ( lo11 )
      or ( n121 );
    n102 <= ( lo17 and not n132 );
    n103 <= ( not n120 )
      or ( not n159 );
    n104 <= ( lo04 and n166 );
    n105 <= ( not lo15 and not lo16 and not lo17 );
    n106 <= ( not lo11 )
      or ( not n121 );
    n107 <= ( lo11 )
      or ( lo13 )
      or ( not n122 );
    n108 <= ( pi0 )
      or ( not lo10 )
      or ( not n131 )
      or ( not n137 );
    n109 <= ( not lo12 and not lo19 and not lo20 );
    n110 <= ( lo13 )
      or ( n163 );
    n111 <= ( pi0 )
      or ( not lo10 );
    n112 <= ( not n99 )
      or ( not n135 );
    n113 <= ( not n142 )
      or ( not n149 );
    n114 <= ( not lo13 )
      or ( not n163 );
    n115 <= ( not pi1 )
      or ( not lo09 );
    n116 <= ( not n130 )
      or ( not n136 );
    n117 <= ( not n146 )
      or ( not n151 );
    n118 <= ( not n96 )
      or ( not n158 );
    n119 <= ( not n101 )
      or ( not n106 );
    n120 <= ( not lo15 )
      or ( not n126 );
    n121 <= ( lo13 and n163 );
    n122 <= ( not n143 )
      or ( not n161 );
    li04 <= ( not n128 )
      or ( not n145 );
    n124 <= ( lo18 )
      or ( n169 );
    n125 <= ( lo11 and lo13 and n163 );
    n126 <= ( lo16 and lo17 and not n132 );
    n127 <= ( not pi0 and lo05 and lo10 and not lo11 );
    n128 <= ( lo13 )
      or ( not n127 );
    n129 <= ( lo04 )
      or ( lo10 )
      or ( lo11 )
      or ( not lo13 );
    n130 <= ( lo12 )
      or ( lo20 );
    n131 <= ( not lo05 )
      or ( lo11 )
      or ( lo13 );
    n132 <= ( not lo09 and not n139 );
    n133 <= ( not n115 )
      or ( not n138 );
    n134 <= ( lo00 )
      or ( lo04 )
      or ( lo10 );
    n135 <= ( lo17 )
      or ( not n132 );
    n136 <= ( not lo12 )
      or ( not lo20 );
    n137 <= ( not lo00 )
      or ( not lo05 );
    n138 <= ( pi1 )
      or ( lo09 );
    n139 <= ( lo18 and not n109 );
    n140 <= ( not li04 and n168 );
    n141 <= ( lo00 and not n95 and n163 );
    n142 <= ( lo19 )
      or ( n150 );
    n143 <= ( pi0 )
      or ( not lo00 )
      or ( lo10 );
    n144 <= ( pi0 )
      or ( not lo00 )
      or ( lo11 )
      or ( lo13 );
    n145 <= ( not n154 )
      or ( not n160 );
    n146 <= ( not pi2 )
      or ( not lo05 );
    n147 <= ( not lo15 and li04 );
    n148 <= ( lo16 )
      or ( n102 );
    n149 <= ( not lo19 )
      or ( not n150 );
    n150 <= ( lo12 and lo20 );
    n151 <= ( pi2 )
      or ( lo05 );
    n152 <= ( not pi0 and lo00 and not lo13 );
    n153 <= ( not li04 and n171 );
    n154 <= ( not pi0 and lo04 );
    n155 <= ( lo00 )
      or ( n172 );
    n156 <= ( not pi0 and lo11 and lo13 );
    n157 <= ( not lo15 and n171 );
    n158 <= ( lo10 )
      or ( n125 );
    n159 <= ( lo15 )
      or ( n126 );
    n160 <= ( lo00 )
      or ( lo05 )
      or ( not lo10 )
      or ( n167 );
    n161 <= ( pi0 )
      or ( lo00 )
      or ( not lo05 )
      or ( not lo10 );
    n162 <= ( lo14 )
      or ( n170 );
    n163 <= ( lo14 and not n105 and not n132 );
    n164 <= ( not pi0 and lo10 );
    n165 <= ( pi0 )
      or ( lo04 )
      or ( lo10 )
      or ( not lo11 );
    n166 <= ( lo00 )
      or ( lo05 )
      or ( lo11 )
      or ( not lo13 );
    n167 <= ( lo11 )
      or ( not lo13 );
    n168 <= ( not n111 )
      or ( not n144 );
    n169 <= ( lo12 and lo19 and lo20 );
    n170 <= ( lo15 and lo16 and lo17 and not n132 );
    n171 <= ( not n107 )
      or ( not n145 );
    n172 <= ( lo10 and lo11 and lo13 and n163 );
    po0 <= ( lo03 );
    po1 <= ( lo01 );
    po3 <= ( lo02 );
    po5 <= ( lo06 );
end IWLS93__s382_behav;
