--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity top is 
  Port (
    pi00,pi01,pi02,pi03,pi04,pi05,pi06,pi07,pi08,pi09,pi10,pi11,pi12,pi13,pi14,pi15,pi16,pi17,pi18,pi19,pi20,pi21,pi22,pi23,pi24,pi25,pi26,pi27,pi28,pi29,pi30,pi31,pi32,pi33,pi34,pi35: in std_logic;
    po00,po01,po02,po03,po04,po05,po06,po07,po08,po09,po10,po11,po12,po13,po14,po15: inout std_logic
  );
end top;

architecture top_behav of top is
signal n68,n69,n70,n71,n72,n73,n74,n75,n76,n77,n78,n79,n80,n81,n82,n83: std_logic;
begin
    po00 <= ( not n68 and pi19 )
      or ( not pi20 and not pi19 );
    po01 <= ( not n69 and pi19 )
      or ( not pi21 and not pi19 );
    po02 <= ( not n70 and pi19 )
      or ( not pi22 and not pi19 );
    po03 <= ( not n71 and pi19 )
      or ( not pi23 and not pi19 );
    po04 <= ( not n72 and pi19 )
      or ( not pi24 and not pi19 );
    po05 <= ( not n73 and pi19 )
      or ( not pi25 and not pi19 );
    po06 <= ( not n74 and pi19 )
      or ( not pi26 and not pi19 );
    po07 <= ( not n75 and pi19 )
      or ( not pi27 and not pi19 );
    po08 <= ( not n76 and pi19 )
      or ( not pi28 and not pi19 );
    po09 <= ( not n77 and pi19 )
      or ( not pi29 and not pi19 );
    po10 <= ( not n78 and pi19 )
      or ( not pi30 and not pi19 );
    po11 <= ( not n79 and pi19 )
      or ( not pi31 and not pi19 );
    po12 <= ( not n80 and pi19 )
      or ( not pi32 and not pi19 );
    po13 <= ( not n81 and pi19 )
      or ( not pi33 and not pi19 );
    po14 <= ( not n82 and pi19 )
      or ( not pi34 and not pi19 );
    po15 <= ( not n83 and pi19 )
      or ( not pi35 and not pi19 );
    n68 <= ( pi17 )
      or ( not pi03 and not pi18 )
      or ( pi18 and pi21 );
    n69 <= ( pi17 )
      or ( not pi02 and not pi18 )
      or ( pi18 and pi22 );
    n70 <= ( pi17 )
      or ( not pi01 and not pi18 )
      or ( pi18 and pi23 );
    n71 <= ( pi17 )
      or ( not pi16 and pi18 )
      or ( not pi00 and not pi18 );
    n72 <= ( pi17 )
      or ( not pi07 and not pi18 )
      or ( pi18 and pi25 );
    n73 <= ( pi17 )
      or ( not pi06 and not pi18 )
      or ( pi18 and pi26 );
    n74 <= ( pi17 )
      or ( not pi05 and not pi18 )
      or ( pi18 and pi27 );
    n75 <= ( pi17 )
      or ( not pi04 and not pi18 )
      or ( pi18 and pi20 );
    n76 <= ( pi17 )
      or ( not pi11 and not pi18 )
      or ( pi18 and pi29 );
    n77 <= ( pi17 )
      or ( not pi10 and not pi18 )
      or ( pi18 and pi30 );
    n78 <= ( pi17 )
      or ( not pi09 and not pi18 )
      or ( pi18 and pi31 );
    n79 <= ( pi17 )
      or ( not pi08 and not pi18 )
      or ( pi18 and pi24 );
    n80 <= ( pi17 )
      or ( not pi15 and not pi18 )
      or ( pi18 and pi33 );
    n81 <= ( pi17 )
      or ( not pi14 and not pi18 )
      or ( pi18 and pi34 );
    n82 <= ( pi17 )
      or ( not pi13 and not pi18 )
      or ( pi18 and pi35 );
    n83 <= ( pi17 )
      or ( not pi12 and not pi18 )
      or ( pi18 and pi28 );
end top_behav;
