--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity Cookbook__ucrypt__part157 is 
  Port (
    lo0484: in std_logic;
    n3679: inout std_logic
  );
end Cookbook__ucrypt__part157;

architecture Cookbook__ucrypt__part157_behav of Cookbook__ucrypt__part157 is
begin
    n3679 <= ( lo0484 );
end Cookbook__ucrypt__part157_behav;
