--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity Cookbook__ucrypt__part51 is 
  Port (
    lo0154: in std_logic;
    n2029: inout std_logic
  );
end Cookbook__ucrypt__part51;

architecture Cookbook__ucrypt__part51_behav of Cookbook__ucrypt__part51 is
begin
    n2029 <= ( lo0154 );
end Cookbook__ucrypt__part51_behav;
