--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity Cookbook__ucrypt__part83 is 
  Port (
    lo0264: in std_logic;
    n2429: inout std_logic
  );
end Cookbook__ucrypt__part83;

architecture Cookbook__ucrypt__part83_behav of Cookbook__ucrypt__part83 is
begin
    n2429 <= ( lo0264 );
end Cookbook__ucrypt__part83_behav;
