--- VHDL generated by LogSynth framework (c) Petr Fiser
Library IEEE;
use IEEE.std_logic_1164.all;

entity Cookbook__ucrypt__part228 is 
  Port (
    lo0779: in std_logic;
    n5154: inout std_logic
  );
end Cookbook__ucrypt__part228;

architecture Cookbook__ucrypt__part228_behav of Cookbook__ucrypt__part228 is
begin
    n5154 <= ( lo0779 );
end Cookbook__ucrypt__part228_behav;
